spi-topcliff-pch: Fix issue for transmitting over 4KByte
[zen-stable.git] / arch / s390 / include / asm / processor.h
blobd25843a6a91512409aca2d56458d06cd9f90922f
1 /*
2 * include/asm-s390/processor.h
4 * S390 version
5 * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Hartmut Penner (hp@de.ibm.com),
7 * Martin Schwidefsky (schwidefsky@de.ibm.com)
9 * Derived from "include/asm-i386/processor.h"
10 * Copyright (C) 1994, Linus Torvalds
13 #ifndef __ASM_S390_PROCESSOR_H
14 #define __ASM_S390_PROCESSOR_H
16 #include <linux/linkage.h>
17 #include <asm/cpu.h>
18 #include <asm/page.h>
19 #include <asm/ptrace.h>
20 #include <asm/setup.h>
22 #ifdef __KERNEL__
24 * Default implementation of macro that returns current
25 * instruction pointer ("program counter").
27 #define current_text_addr() ({ void *pc; asm("basr %0,0" : "=a" (pc)); pc; })
29 static inline void get_cpu_id(struct cpuid *ptr)
31 asm volatile("stidp %0" : "=Q" (*ptr));
34 extern void s390_adjust_jiffies(void);
35 extern int get_cpu_capability(unsigned int *);
36 extern const struct seq_operations cpuinfo_op;
37 extern int sysctl_ieee_emulation_warnings;
40 * User space process size: 2GB for 31 bit, 4TB or 8PT for 64 bit.
42 #ifndef __s390x__
44 #define TASK_SIZE (1UL << 31)
45 #define TASK_UNMAPPED_BASE (1UL << 30)
47 #else /* __s390x__ */
49 #define TASK_SIZE_OF(tsk) ((tsk)->mm->context.asce_limit)
50 #define TASK_UNMAPPED_BASE (test_thread_flag(TIF_31BIT) ? \
51 (1UL << 30) : (1UL << 41))
52 #define TASK_SIZE TASK_SIZE_OF(current)
54 #endif /* __s390x__ */
56 #ifdef __KERNEL__
58 #ifndef __s390x__
59 #define STACK_TOP (1UL << 31)
60 #define STACK_TOP_MAX (1UL << 31)
61 #else /* __s390x__ */
62 #define STACK_TOP (1UL << (test_thread_flag(TIF_31BIT) ? 31:42))
63 #define STACK_TOP_MAX (1UL << 42)
64 #endif /* __s390x__ */
67 #endif
69 #define HAVE_ARCH_PICK_MMAP_LAYOUT
71 typedef struct {
72 __u32 ar4;
73 } mm_segment_t;
76 * Thread structure
78 struct thread_struct {
79 s390_fp_regs fp_regs;
80 unsigned int acrs[NUM_ACRS];
81 unsigned long ksp; /* kernel stack pointer */
82 mm_segment_t mm_segment;
83 unsigned long gmap_addr; /* address of last gmap fault. */
84 struct per_regs per_user; /* User specified PER registers */
85 struct per_event per_event; /* Cause of the last PER trap */
86 /* pfault_wait is used to block the process on a pfault event */
87 unsigned long pfault_wait;
88 struct list_head list;
91 typedef struct thread_struct thread_struct;
94 * Stack layout of a C stack frame.
96 #ifndef __PACK_STACK
97 struct stack_frame {
98 unsigned long back_chain;
99 unsigned long empty1[5];
100 unsigned long gprs[10];
101 unsigned int empty2[8];
103 #else
104 struct stack_frame {
105 unsigned long empty1[5];
106 unsigned int empty2[8];
107 unsigned long gprs[10];
108 unsigned long back_chain;
110 #endif
112 #define ARCH_MIN_TASKALIGN 8
114 #define INIT_THREAD { \
115 .ksp = sizeof(init_stack) + (unsigned long) &init_stack, \
119 * Do necessary setup to start up a new thread.
121 #define start_thread(regs, new_psw, new_stackp) do { \
122 regs->psw.mask = psw_user_bits | PSW_MASK_EA | PSW_MASK_BA; \
123 regs->psw.addr = new_psw | PSW_ADDR_AMODE; \
124 regs->gprs[15] = new_stackp; \
125 } while (0)
127 #define start_thread31(regs, new_psw, new_stackp) do { \
128 regs->psw.mask = psw_user_bits | PSW_MASK_BA; \
129 regs->psw.addr = new_psw | PSW_ADDR_AMODE; \
130 regs->gprs[15] = new_stackp; \
131 crst_table_downgrade(current->mm, 1UL << 31); \
132 } while (0)
134 /* Forward declaration, a strange C thing */
135 struct task_struct;
136 struct mm_struct;
137 struct seq_file;
139 /* Free all resources held by a thread. */
140 extern void release_thread(struct task_struct *);
141 extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
143 /* Prepare to copy thread state - unlazy all lazy status */
144 #define prepare_to_copy(tsk) do { } while (0)
147 * Return saved PC of a blocked thread.
149 extern unsigned long thread_saved_pc(struct task_struct *t);
151 extern void show_code(struct pt_regs *regs);
153 unsigned long get_wchan(struct task_struct *p);
154 #define task_pt_regs(tsk) ((struct pt_regs *) \
155 (task_stack_page(tsk) + THREAD_SIZE) - 1)
156 #define KSTK_EIP(tsk) (task_pt_regs(tsk)->psw.addr)
157 #define KSTK_ESP(tsk) (task_pt_regs(tsk)->gprs[15])
160 * Give up the time slice of the virtual PU.
162 static inline void cpu_relax(void)
164 if (MACHINE_HAS_DIAG44)
165 asm volatile("diag 0,0,68");
166 barrier();
169 static inline void psw_set_key(unsigned int key)
171 asm volatile("spka 0(%0)" : : "d" (key));
175 * Set PSW to specified value.
177 static inline void __load_psw(psw_t psw)
179 #ifndef __s390x__
180 asm volatile("lpsw %0" : : "Q" (psw) : "cc");
181 #else
182 asm volatile("lpswe %0" : : "Q" (psw) : "cc");
183 #endif
187 * Set PSW mask to specified value, while leaving the
188 * PSW addr pointing to the next instruction.
190 static inline void __load_psw_mask (unsigned long mask)
192 unsigned long addr;
193 psw_t psw;
195 psw.mask = mask;
197 #ifndef __s390x__
198 asm volatile(
199 " basr %0,0\n"
200 "0: ahi %0,1f-0b\n"
201 " st %0,%O1+4(%R1)\n"
202 " lpsw %1\n"
203 "1:"
204 : "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc");
205 #else /* __s390x__ */
206 asm volatile(
207 " larl %0,1f\n"
208 " stg %0,%O1+8(%R1)\n"
209 " lpswe %1\n"
210 "1:"
211 : "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc");
212 #endif /* __s390x__ */
216 * Rewind PSW instruction address by specified number of bytes.
218 static inline unsigned long __rewind_psw(psw_t psw, unsigned long ilc)
220 #ifndef __s390x__
221 if (psw.addr & PSW_ADDR_AMODE)
222 /* 31 bit mode */
223 return (psw.addr - ilc) | PSW_ADDR_AMODE;
224 /* 24 bit mode */
225 return (psw.addr - ilc) & ((1UL << 24) - 1);
226 #else
227 unsigned long mask;
229 mask = (psw.mask & PSW_MASK_EA) ? -1UL :
230 (psw.mask & PSW_MASK_BA) ? (1UL << 31) - 1 :
231 (1UL << 24) - 1;
232 return (psw.addr - ilc) & mask;
233 #endif
237 * Function to drop a processor into disabled wait state
239 static inline void __noreturn disabled_wait(unsigned long code)
241 unsigned long ctl_buf;
242 psw_t dw_psw;
244 dw_psw.mask = PSW_MASK_BASE | PSW_MASK_WAIT | PSW_MASK_BA | PSW_MASK_EA;
245 dw_psw.addr = code;
247 * Store status and then load disabled wait psw,
248 * the processor is dead afterwards
250 #ifndef __s390x__
251 asm volatile(
252 " stctl 0,0,0(%2)\n"
253 " ni 0(%2),0xef\n" /* switch off protection */
254 " lctl 0,0,0(%2)\n"
255 " stpt 0xd8\n" /* store timer */
256 " stckc 0xe0\n" /* store clock comparator */
257 " stpx 0x108\n" /* store prefix register */
258 " stam 0,15,0x120\n" /* store access registers */
259 " std 0,0x160\n" /* store f0 */
260 " std 2,0x168\n" /* store f2 */
261 " std 4,0x170\n" /* store f4 */
262 " std 6,0x178\n" /* store f6 */
263 " stm 0,15,0x180\n" /* store general registers */
264 " stctl 0,15,0x1c0\n" /* store control registers */
265 " oi 0x1c0,0x10\n" /* fake protection bit */
266 " lpsw 0(%1)"
267 : "=m" (ctl_buf)
268 : "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc");
269 #else /* __s390x__ */
270 asm volatile(
271 " stctg 0,0,0(%2)\n"
272 " ni 4(%2),0xef\n" /* switch off protection */
273 " lctlg 0,0,0(%2)\n"
274 " lghi 1,0x1000\n"
275 " stpt 0x328(1)\n" /* store timer */
276 " stckc 0x330(1)\n" /* store clock comparator */
277 " stpx 0x318(1)\n" /* store prefix register */
278 " stam 0,15,0x340(1)\n"/* store access registers */
279 " stfpc 0x31c(1)\n" /* store fpu control */
280 " std 0,0x200(1)\n" /* store f0 */
281 " std 1,0x208(1)\n" /* store f1 */
282 " std 2,0x210(1)\n" /* store f2 */
283 " std 3,0x218(1)\n" /* store f3 */
284 " std 4,0x220(1)\n" /* store f4 */
285 " std 5,0x228(1)\n" /* store f5 */
286 " std 6,0x230(1)\n" /* store f6 */
287 " std 7,0x238(1)\n" /* store f7 */
288 " std 8,0x240(1)\n" /* store f8 */
289 " std 9,0x248(1)\n" /* store f9 */
290 " std 10,0x250(1)\n" /* store f10 */
291 " std 11,0x258(1)\n" /* store f11 */
292 " std 12,0x260(1)\n" /* store f12 */
293 " std 13,0x268(1)\n" /* store f13 */
294 " std 14,0x270(1)\n" /* store f14 */
295 " std 15,0x278(1)\n" /* store f15 */
296 " stmg 0,15,0x280(1)\n"/* store general registers */
297 " stctg 0,15,0x380(1)\n"/* store control registers */
298 " oi 0x384(1),0x10\n"/* fake protection bit */
299 " lpswe 0(%1)"
300 : "=m" (ctl_buf)
301 : "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc", "0", "1");
302 #endif /* __s390x__ */
303 while (1);
307 * Basic Machine Check/Program Check Handler.
310 extern void s390_base_mcck_handler(void);
311 extern void s390_base_pgm_handler(void);
312 extern void s390_base_ext_handler(void);
314 extern void (*s390_base_mcck_handler_fn)(void);
315 extern void (*s390_base_pgm_handler_fn)(void);
316 extern void (*s390_base_ext_handler_fn)(void);
318 #define ARCH_LOW_ADDRESS_LIMIT 0x7fffffffUL
320 #endif
323 * Helper macro for exception table entries
325 #ifndef __s390x__
326 #define EX_TABLE(_fault,_target) \
327 ".section __ex_table,\"a\"\n" \
328 " .align 4\n" \
329 " .long " #_fault "," #_target "\n" \
330 ".previous\n"
331 #else
332 #define EX_TABLE(_fault,_target) \
333 ".section __ex_table,\"a\"\n" \
334 " .align 8\n" \
335 " .quad " #_fault "," #_target "\n" \
336 ".previous\n"
337 #endif
339 #endif /* __ASM_S390_PROCESSOR_H */