arch/sparc/kernel/sun4d_smp.c

   1 /* Sparc SS1000/SC2000 SMP support.
   2  *
   3  * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
   4  *
   5  * Based on sun4m's smp.c, which is:
   6  * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
   7  */
   8
   9 #include <linux/interrupt.h>
  10 #include <linux/profile.h>
  11 #include <linux/delay.h>
  12 #include <linux/cpu.h>
  13
  14 #include <asm/sbi.h>
  15 #include <asm/mmu.h>
  16 #include <asm/tlbflush.h>
  17 #include <asm/cacheflush.h>
  18
  19 #include "kernel.h"
  20 #include "irq.h"
  21
  22 #define IRQ_CROSS_CALL          15
  23
  24 static volatile int smp_processors_ready;
  25 static int smp_highest_cpu;
  26
  27 static inline unsigned long sun4d_swap(volatile unsigned long *ptr, unsigned long val)
  28 {
  29         __asm__ __volatile__("swap [%1], %0\n\t" :
  30                              "=&r" (val), "=&r" (ptr) :
  31                              "0" (val), "1" (ptr));
  32         return val;
  33 }
  34
  35 static void smp4d_ipi_init(void);
  36 static void smp_setup_percpu_timer(void);
  37
  38 static unsigned char cpu_leds[32];
  39
  40 static inline void show_leds(int cpuid)
  41 {
  42         cpuid &= 0x1e;
  43         __asm__ __volatile__ ("stba %0, [%1] %2" : :
  44                               "r" ((cpu_leds[cpuid] << 4) | cpu_leds[cpuid+1]),
  45                               "r" (ECSR_BASE(cpuid) | BB_LEDS),
  46                               "i" (ASI_M_CTL));
  47 }
  48
  49 void __cpuinit smp4d_callin(void)
  50 {
  51         int cpuid = hard_smp4d_processor_id();
  52         unsigned long flags;
  53
  54         /* Show we are alive */
  55         cpu_leds[cpuid] = 0x6;
  56         show_leds(cpuid);
  57
  58         /* Enable level15 interrupt, disable level14 interrupt for now */
  59         cc_set_imsk((cc_get_imsk() & ~0x8000) | 0x4000);
  60
  61         local_flush_cache_all();
  62         local_flush_tlb_all();
  63
  64         notify_cpu_starting(cpuid);
  65         /*
  66          * Unblock the master CPU _only_ when the scheduler state
  67          * of all secondary CPUs will be up-to-date, so after
  68          * the SMP initialization the master will be just allowed
  69          * to call the scheduler code.
  70          */
  71         /* Get our local ticker going. */
  72         smp_setup_percpu_timer();
  73
  74         calibrate_delay();
  75         smp_store_cpu_info(cpuid);
  76         local_flush_cache_all();
  77         local_flush_tlb_all();
  78
  79         /* Allow master to continue. */
  80         sun4d_swap((unsigned long *)&cpu_callin_map[cpuid], 1);
  81         local_flush_cache_all();
  82         local_flush_tlb_all();
  83
  84         while ((unsigned long)current_set[cpuid] < PAGE_OFFSET)
  85                 barrier();
  86
  87         while (current_set[cpuid]->cpu != cpuid)
  88                 barrier();
  89
  90         /* Fix idle thread fields. */
  91         __asm__ __volatile__("ld [%0], %%g6\n\t"
  92                              : : "r" (&current_set[cpuid])
  93                              : "memory" /* paranoid */);
  94
  95         cpu_leds[cpuid] = 0x9;
  96         show_leds(cpuid);
  97
  98         /* Attach to the address space of init_task. */
  99         atomic_inc(&init_mm.mm_count);
 100         current->active_mm = &init_mm;
 101
 102         local_flush_cache_all();
 103         local_flush_tlb_all();
 104
 105         local_irq_enable();     /* We don't allow PIL 14 yet */
 106
 107         while (!cpumask_test_cpu(cpuid, &smp_commenced_mask))
 108                 barrier();
 109
 110         spin_lock_irqsave(&sun4d_imsk_lock, flags);
 111         cc_set_imsk(cc_get_imsk() & ~0x4000); /* Allow PIL 14 as well */
 112         spin_unlock_irqrestore(&sun4d_imsk_lock, flags);
 113         set_cpu_online(cpuid, true);
 114
 115 }
 116
 117 /*
 118  *      Cycle through the processors asking the PROM to start each one.
 119  */
 120 void __init smp4d_boot_cpus(void)
 121 {
 122         smp4d_ipi_init();
 123         if (boot_cpu_id)
 124                 current_set[0] = NULL;
 125         smp_setup_percpu_timer();
 126         local_flush_cache_all();
 127 }
 128
 129 int __cpuinit smp4d_boot_one_cpu(int i)
 130 {
 131         unsigned long *entry = &sun4d_cpu_startup;
 132         struct task_struct *p;
 133         int timeout;
 134         int cpu_node;
 135
 136         cpu_find_by_instance(i, &cpu_node, NULL);
 137         /* Cook up an idler for this guy. */
 138         p = fork_idle(i);
 139         current_set[i] = task_thread_info(p);
 140
 141         /*
 142          * Initialize the contexts table
 143          * Since the call to prom_startcpu() trashes the structure,
 144          * we need to re-initialize it for each cpu
 145          */
 146         smp_penguin_ctable.which_io = 0;
 147         smp_penguin_ctable.phys_addr = (unsigned int) srmmu_ctx_table_phys;
 148         smp_penguin_ctable.reg_size = 0;
 149
 150         /* whirrr, whirrr, whirrrrrrrrr... */
 151         printk(KERN_INFO "Starting CPU %d at %p\n", i, entry);
 152         local_flush_cache_all();
 153         prom_startcpu(cpu_node,
 154                       &smp_penguin_ctable, 0, (char *)entry);
 155
 156         printk(KERN_INFO "prom_startcpu returned :)\n");
 157
 158         /* wheee... it's going... */
 159         for (timeout = 0; timeout < 10000; timeout++) {
 160                 if (cpu_callin_map[i])
 161                         break;
 162                 udelay(200);
 163         }
 164
 165         if (!(cpu_callin_map[i])) {
 166                 printk(KERN_ERR "Processor %d is stuck.\n", i);
 167                 return -ENODEV;
 168
 169         }
 170         local_flush_cache_all();
 171         return 0;
 172 }
 173
 174 void __init smp4d_smp_done(void)
 175 {
 176         int i, first;
 177         int *prev;
 178
 179         /* setup cpu list for irq rotation */
 180         first = 0;
 181         prev = &first;
 182         for_each_online_cpu(i) {
 183                 *prev = i;
 184                 prev = &cpu_data(i).next;
 185         }
 186         *prev = first;
 187         local_flush_cache_all();
 188
 189         /* Ok, they are spinning and ready to go. */
 190         smp_processors_ready = 1;
 191         sun4d_distribute_irqs();
 192 }
 193
 194 /* Memory structure giving interrupt handler information about IPI generated */
 195 struct sun4d_ipi_work {
 196         int single;
 197         int msk;
 198         int resched;
 199 };
 200
 201 static DEFINE_PER_CPU_SHARED_ALIGNED(struct sun4d_ipi_work, sun4d_ipi_work);
 202
 203 /* Initialize IPIs on the SUN4D SMP machine */
 204 static void __init smp4d_ipi_init(void)
 205 {
 206         int cpu;
 207         struct sun4d_ipi_work *work;
 208
 209         printk(KERN_INFO "smp4d: setup IPI at IRQ %d\n", SUN4D_IPI_IRQ);
 210
 211         for_each_possible_cpu(cpu) {
 212                 work = &per_cpu(sun4d_ipi_work, cpu);
 213                 work->single = work->msk = work->resched = 0;
 214         }
 215 }
 216
 217 void sun4d_ipi_interrupt(void)
 218 {
 219         struct sun4d_ipi_work *work = &__get_cpu_var(sun4d_ipi_work);
 220
 221         if (work->single) {
 222                 work->single = 0;
 223                 smp_call_function_single_interrupt();
 224         }
 225         if (work->msk) {
 226                 work->msk = 0;
 227                 smp_call_function_interrupt();
 228         }
 229         if (work->resched) {
 230                 work->resched = 0;
 231                 smp_resched_interrupt();
 232         }
 233 }
 234
 235 static void smp4d_ipi_single(int cpu)
 236 {
 237         struct sun4d_ipi_work *work = &per_cpu(sun4d_ipi_work, cpu);
 238
 239         /* Mark work */
 240         work->single = 1;
 241
 242         /* Generate IRQ on the CPU */
 243         sun4d_send_ipi(cpu, SUN4D_IPI_IRQ);
 244 }
 245
 246 static void smp4d_ipi_mask_one(int cpu)
 247 {
 248         struct sun4d_ipi_work *work = &per_cpu(sun4d_ipi_work, cpu);
 249
 250         /* Mark work */
 251         work->msk = 1;
 252
 253         /* Generate IRQ on the CPU */
 254         sun4d_send_ipi(cpu, SUN4D_IPI_IRQ);
 255 }
 256
 257 static void smp4d_ipi_resched(int cpu)
 258 {
 259         struct sun4d_ipi_work *work = &per_cpu(sun4d_ipi_work, cpu);
 260
 261         /* Mark work */
 262         work->resched = 1;
 263
 264         /* Generate IRQ on the CPU (any IRQ will cause resched) */
 265         sun4d_send_ipi(cpu, SUN4D_IPI_IRQ);
 266 }
 267
 268 static struct smp_funcall {
 269         smpfunc_t func;
 270         unsigned long arg1;
 271         unsigned long arg2;
 272         unsigned long arg3;
 273         unsigned long arg4;
 274         unsigned long arg5;
 275         unsigned char processors_in[NR_CPUS];  /* Set when ipi entered. */
 276         unsigned char processors_out[NR_CPUS]; /* Set when ipi exited. */
 277 } ccall_info __attribute__((aligned(8)));
 278
 279 static DEFINE_SPINLOCK(cross_call_lock);
 280
 281 /* Cross calls must be serialized, at least currently. */
 282 static void smp4d_cross_call(smpfunc_t func, cpumask_t mask, unsigned long arg1,
 283                              unsigned long arg2, unsigned long arg3,
 284                              unsigned long arg4)
 285 {
 286         if (smp_processors_ready) {
 287                 register int high = smp_highest_cpu;
 288                 unsigned long flags;
 289
 290                 spin_lock_irqsave(&cross_call_lock, flags);
 291
 292                 {
 293                         /*
 294                          * If you make changes here, make sure
 295                          * gcc generates proper code...
 296                          */
 297                         register smpfunc_t f asm("i0") = func;
 298                         register unsigned long a1 asm("i1") = arg1;
 299                         register unsigned long a2 asm("i2") = arg2;
 300                         register unsigned long a3 asm("i3") = arg3;
 301                         register unsigned long a4 asm("i4") = arg4;
 302                         register unsigned long a5 asm("i5") = 0;
 303
 304                         __asm__ __volatile__(
 305                                 "std %0, [%6]\n\t"
 306                                 "std %2, [%6 + 8]\n\t"
 307                                 "std %4, [%6 + 16]\n\t" : :
 308                                 "r"(f), "r"(a1), "r"(a2), "r"(a3), "r"(a4), "r"(a5),
 309                                 "r" (&ccall_info.func));
 310                 }
 311
 312                 /* Init receive/complete mapping, plus fire the IPI's off. */
 313                 {
 314                         register int i;
 315
 316                         cpumask_clear_cpu(smp_processor_id(), &mask);
 317                         cpumask_and(&mask, cpu_online_mask, &mask);
 318                         for (i = 0; i <= high; i++) {
 319                                 if (cpumask_test_cpu(i, &mask)) {
 320                                         ccall_info.processors_in[i] = 0;
 321                                         ccall_info.processors_out[i] = 0;
 322                                         sun4d_send_ipi(i, IRQ_CROSS_CALL);
 323                                 }
 324                         }
 325                 }
 326
 327                 {
 328                         register int i;
 329
 330                         i = 0;
 331                         do {
 332                                 if (!cpumask_test_cpu(i, &mask))
 333                                         continue;
 334                                 while (!ccall_info.processors_in[i])
 335                                         barrier();
 336                         } while (++i <= high);
 337
 338                         i = 0;
 339                         do {
 340                                 if (!cpumask_test_cpu(i, &mask))
 341                                         continue;
 342                                 while (!ccall_info.processors_out[i])
 343                                         barrier();
 344                         } while (++i <= high);
 345                 }
 346
 347                 spin_unlock_irqrestore(&cross_call_lock, flags);
 348         }
 349 }
 350
 351 /* Running cross calls. */
 352 void smp4d_cross_call_irq(void)
 353 {
 354         int i = hard_smp4d_processor_id();
 355
 356         ccall_info.processors_in[i] = 1;
 357         ccall_info.func(ccall_info.arg1, ccall_info.arg2, ccall_info.arg3,
 358                         ccall_info.arg4, ccall_info.arg5);
 359         ccall_info.processors_out[i] = 1;
 360 }
 361
 362 void smp4d_percpu_timer_interrupt(struct pt_regs *regs)
 363 {
 364         struct pt_regs *old_regs;
 365         int cpu = hard_smp4d_processor_id();
 366         static int cpu_tick[NR_CPUS];
 367         static char led_mask[] = { 0xe, 0xd, 0xb, 0x7, 0xb, 0xd };
 368
 369         old_regs = set_irq_regs(regs);
 370         bw_get_prof_limit(cpu);
 371         bw_clear_intr_mask(0, 1);       /* INTR_TABLE[0] & 1 is Profile IRQ */
 372
 373         cpu_tick[cpu]++;
 374         if (!(cpu_tick[cpu] & 15)) {
 375                 if (cpu_tick[cpu] == 0x60)
 376                         cpu_tick[cpu] = 0;
 377                 cpu_leds[cpu] = led_mask[cpu_tick[cpu] >> 4];
 378                 show_leds(cpu);
 379         }
 380
 381         profile_tick(CPU_PROFILING);
 382
 383         if (!--prof_counter(cpu)) {
 384                 int user = user_mode(regs);
 385
 386                 irq_enter();
 387                 update_process_times(user);
 388                 irq_exit();
 389
 390                 prof_counter(cpu) = prof_multiplier(cpu);
 391         }
 392         set_irq_regs(old_regs);
 393 }
 394
 395 static void __cpuinit smp_setup_percpu_timer(void)
 396 {
 397         int cpu = hard_smp4d_processor_id();
 398
 399         prof_counter(cpu) = prof_multiplier(cpu) = 1;
 400         load_profile_irq(cpu, lvl14_resolution);
 401 }
 402
 403 void __init smp4d_blackbox_id(unsigned *addr)
 404 {
 405         int rd = *addr & 0x3e000000;
 406
 407         addr[0] = 0xc0800800 | rd;              /* lda [%g0] ASI_M_VIKING_TMP1, reg */
 408         addr[1] = 0x01000000;                   /* nop */
 409         addr[2] = 0x01000000;                   /* nop */
 410 }
 411
 412 void __init smp4d_blackbox_current(unsigned *addr)
 413 {
 414         int rd = *addr & 0x3e000000;
 415
 416         addr[0] = 0xc0800800 | rd;              /* lda [%g0] ASI_M_VIKING_TMP1, reg */
 417         addr[2] = 0x81282002 | rd | (rd >> 11); /* sll reg, 2, reg */
 418         addr[4] = 0x01000000;                   /* nop */
 419 }
 420
 421 void __init sun4d_init_smp(void)
 422 {
 423         int i;
 424
 425         /* Patch ipi15 trap table */
 426         t_nmi[1] = t_nmi[1] + (linux_trap_ipi15_sun4d - linux_trap_ipi15_sun4m);
 427
 428         /* And set btfixup... */
 429         BTFIXUPSET_BLACKBOX(hard_smp_processor_id, smp4d_blackbox_id);
 430         BTFIXUPSET_BLACKBOX(load_current, smp4d_blackbox_current);
 431         BTFIXUPSET_CALL(smp_cross_call, smp4d_cross_call, BTFIXUPCALL_NORM);
 432         BTFIXUPSET_CALL(__hard_smp_processor_id, __smp4d_processor_id, BTFIXUPCALL_NORM);
 433         BTFIXUPSET_CALL(smp_ipi_resched, smp4d_ipi_resched, BTFIXUPCALL_NORM);
 434         BTFIXUPSET_CALL(smp_ipi_single, smp4d_ipi_single, BTFIXUPCALL_NORM);
 435         BTFIXUPSET_CALL(smp_ipi_mask_one, smp4d_ipi_mask_one, BTFIXUPCALL_NORM);
 436
 437         for (i = 0; i < NR_CPUS; i++) {
 438                 ccall_info.processors_in[i] = 1;
 439                 ccall_info.processors_out[i] = 1;
 440         }
 441 }