arch/tile/include/asm/io.h

   1 /*
   2  * Copyright 2010 Tilera Corporation. All Rights Reserved.
   3  *
   4  *   This program is free software; you can redistribute it and/or
   5  *   modify it under the terms of the GNU General Public License
   6  *   as published by the Free Software Foundation, version 2.
   7  *
   8  *   This program is distributed in the hope that it will be useful, but
   9  *   WITHOUT ANY WARRANTY; without even the implied warranty of
  10  *   MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  11  *   NON INFRINGEMENT.  See the GNU General Public License for
  12  *   more details.
  13  */
  14
  15 #ifndef _ASM_TILE_IO_H
  16 #define _ASM_TILE_IO_H
  17
  18 #include <linux/kernel.h>
  19 #include <linux/bug.h>
  20 #include <asm/page.h>
  21
  22 #define IO_SPACE_LIMIT 0xfffffffful
  23
  24 /*
  25  * Convert a physical pointer to a virtual kernel pointer for /dev/mem
  26  * access.
  27  */
  28 #define xlate_dev_mem_ptr(p)    __va(p)
  29
  30 /*
  31  * Convert a virtual cached pointer to an uncached pointer.
  32  */
  33 #define xlate_dev_kmem_ptr(p)   p
  34
  35 /*
  36  * Change "struct page" to physical address.
  37  */
  38 #define page_to_phys(page)    ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
  39
  40 /*
  41  * Some places try to pass in an loff_t for PHYSADDR (?!), so we cast it to
  42  * long before casting it to a pointer to avoid compiler warnings.
  43  */
  44 #if CHIP_HAS_MMIO()
  45 extern void __iomem *ioremap(resource_size_t offset, unsigned long size);
  46 extern void __iomem *ioremap_prot(resource_size_t offset, unsigned long size,
  47         pgprot_t pgprot);
  48 extern void iounmap(volatile void __iomem *addr);
  49 #else
  50 #define ioremap(physaddr, size) ((void __iomem *)(unsigned long)(physaddr))
  51 #define iounmap(addr)           ((void)0)
  52 #endif
  53
  54 #define ioremap_nocache(physaddr, size)         ioremap(physaddr, size)
  55 #define ioremap_wc(physaddr, size)              ioremap(physaddr, size)
  56 #define ioremap_writethrough(physaddr, size)    ioremap(physaddr, size)
  57 #define ioremap_fullcache(physaddr, size)       ioremap(physaddr, size)
  58
  59 #define mmiowb()
  60
  61 /* Conversion between virtual and physical mappings.  */
  62 #define mm_ptov(addr)           ((void *)phys_to_virt(addr))
  63 #define mm_vtop(addr)           ((unsigned long)virt_to_phys(addr))
  64
  65 #ifdef CONFIG_PCI
  66
  67 extern u8 _tile_readb(unsigned long addr);
  68 extern u16 _tile_readw(unsigned long addr);
  69 extern u32 _tile_readl(unsigned long addr);
  70 extern u64 _tile_readq(unsigned long addr);
  71 extern void _tile_writeb(u8  val, unsigned long addr);
  72 extern void _tile_writew(u16 val, unsigned long addr);
  73 extern void _tile_writel(u32 val, unsigned long addr);
  74 extern void _tile_writeq(u64 val, unsigned long addr);
  75
  76 #else
  77
  78 /*
  79  * The Tile architecture does not support IOMEM unless PCI is enabled.
  80  * Unfortunately we can't yet simply not declare these methods,
  81  * since some generic code that compiles into the kernel, but
  82  * we never run, uses them unconditionally.
  83  */
  84
  85 static inline int iomem_panic(void)
  86 {
  87         panic("readb/writeb and friends do not exist on tile without PCI");
  88         return 0;
  89 }
  90
  91 static inline u8 _tile_readb(unsigned long addr)
  92 {
  93         return iomem_panic();
  94 }
  95
  96 static inline u16 _tile_readw(unsigned long addr)
  97 {
  98         return iomem_panic();
  99 }
 100
 101 static inline u32 _tile_readl(unsigned long addr)
 102 {
 103         return iomem_panic();
 104 }
 105
 106 static inline u64 _tile_readq(unsigned long addr)
 107 {
 108         return iomem_panic();
 109 }
 110
 111 static inline void _tile_writeb(u8  val, unsigned long addr)
 112 {
 113         iomem_panic();
 114 }
 115
 116 static inline void _tile_writew(u16 val, unsigned long addr)
 117 {
 118         iomem_panic();
 119 }
 120
 121 static inline void _tile_writel(u32 val, unsigned long addr)
 122 {
 123         iomem_panic();
 124 }
 125
 126 static inline void _tile_writeq(u64 val, unsigned long addr)
 127 {
 128         iomem_panic();
 129 }
 130
 131 #endif
 132
 133 #define readb(addr) _tile_readb((unsigned long)addr)
 134 #define readw(addr) _tile_readw((unsigned long)addr)
 135 #define readl(addr) _tile_readl((unsigned long)addr)
 136 #define readq(addr) _tile_readq((unsigned long)addr)
 137 #define writeb(val, addr) _tile_writeb(val, (unsigned long)addr)
 138 #define writew(val, addr) _tile_writew(val, (unsigned long)addr)
 139 #define writel(val, addr) _tile_writel(val, (unsigned long)addr)
 140 #define writeq(val, addr) _tile_writeq(val, (unsigned long)addr)
 141
 142 #define __raw_readb readb
 143 #define __raw_readw readw
 144 #define __raw_readl readl
 145 #define __raw_readq readq
 146 #define __raw_writeb writeb
 147 #define __raw_writew writew
 148 #define __raw_writel writel
 149 #define __raw_writeq writeq
 150
 151 #define readb_relaxed readb
 152 #define readw_relaxed readw
 153 #define readl_relaxed readl
 154 #define readq_relaxed readq
 155
 156 #define ioread8 readb
 157 #define ioread16 readw
 158 #define ioread32 readl
 159 #define ioread64 readq
 160 #define iowrite8 writeb
 161 #define iowrite16 writew
 162 #define iowrite32 writel
 163 #define iowrite64 writeq
 164
 165 static inline void memset_io(void *dst, int val, size_t len)
 166 {
 167         int x;
 168         BUG_ON((unsigned long)dst & 0x3);
 169         val = (val & 0xff) * 0x01010101;
 170         for (x = 0; x < len; x += 4)
 171                 writel(val, dst + x);
 172 }
 173
 174 static inline void memcpy_fromio(void *dst, const volatile void __iomem *src,
 175                                  size_t len)
 176 {
 177         int x;
 178         BUG_ON((unsigned long)src & 0x3);
 179         for (x = 0; x < len; x += 4)
 180                 *(u32 *)(dst + x) = readl(src + x);
 181 }
 182
 183 static inline void memcpy_toio(volatile void __iomem *dst, const void *src,
 184                                 size_t len)
 185 {
 186         int x;
 187         BUG_ON((unsigned long)dst & 0x3);
 188         for (x = 0; x < len; x += 4)
 189                 writel(*(u32 *)(src + x), dst + x);
 190 }
 191
 192 /*
 193  * The Tile architecture does not support IOPORT, even with PCI.
 194  * Unfortunately we can't yet simply not declare these methods,
 195  * since some generic code that compiles into the kernel, but
 196  * we never run, uses them unconditionally.
 197  */
 198
 199 static inline long ioport_panic(void)
 200 {
 201         panic("inb/outb and friends do not exist on tile");
 202         return 0;
 203 }
 204
 205 static inline void __iomem *ioport_map(unsigned long port, unsigned int len)
 206 {
 207         pr_info("ioport_map: mapping IO resources is unsupported on tile.\n");
 208         return NULL;
 209 }
 210
 211 static inline void ioport_unmap(void __iomem *addr)
 212 {
 213         ioport_panic();
 214 }
 215
 216 static inline u8 inb(unsigned long addr)
 217 {
 218         return ioport_panic();
 219 }
 220
 221 static inline u16 inw(unsigned long addr)
 222 {
 223         return ioport_panic();
 224 }
 225
 226 static inline u32 inl(unsigned long addr)
 227 {
 228         return ioport_panic();
 229 }
 230
 231 static inline void outb(u8 b, unsigned long addr)
 232 {
 233         ioport_panic();
 234 }
 235
 236 static inline void outw(u16 b, unsigned long addr)
 237 {
 238         ioport_panic();
 239 }
 240
 241 static inline void outl(u32 b, unsigned long addr)
 242 {
 243         ioport_panic();
 244 }
 245
 246 #define inb_p(addr)     inb(addr)
 247 #define inw_p(addr)     inw(addr)
 248 #define inl_p(addr)     inl(addr)
 249 #define outb_p(x, addr) outb((x), (addr))
 250 #define outw_p(x, addr) outw((x), (addr))
 251 #define outl_p(x, addr) outl((x), (addr))
 252
 253 static inline void insb(unsigned long addr, void *buffer, int count)
 254 {
 255         ioport_panic();
 256 }
 257
 258 static inline void insw(unsigned long addr, void *buffer, int count)
 259 {
 260         ioport_panic();
 261 }
 262
 263 static inline void insl(unsigned long addr, void *buffer, int count)
 264 {
 265         ioport_panic();
 266 }
 267
 268 static inline void outsb(unsigned long addr, const void *buffer, int count)
 269 {
 270         ioport_panic();
 271 }
 272
 273 static inline void outsw(unsigned long addr, const void *buffer, int count)
 274 {
 275         ioport_panic();
 276 }
 277
 278 static inline void outsl(unsigned long addr, const void *buffer, int count)
 279 {
 280         ioport_panic();
 281 }
 282
 283 #define ioread16be(addr)        be16_to_cpu(ioread16(addr))
 284 #define ioread32be(addr)        be32_to_cpu(ioread32(addr))
 285 #define iowrite16be(v, addr)    iowrite16(be16_to_cpu(v), (addr))
 286 #define iowrite32be(v, addr)    iowrite32(be32_to_cpu(v), (addr))
 287
 288 #define ioread8_rep(p, dst, count) \
 289         insb((unsigned long) (p), (dst), (count))
 290 #define ioread16_rep(p, dst, count) \
 291         insw((unsigned long) (p), (dst), (count))
 292 #define ioread32_rep(p, dst, count) \
 293         insl((unsigned long) (p), (dst), (count))
 294
 295 #define iowrite8_rep(p, src, count) \
 296         outsb((unsigned long) (p), (src), (count))
 297 #define iowrite16_rep(p, src, count) \
 298         outsw((unsigned long) (p), (src), (count))
 299 #define iowrite32_rep(p, src, count) \
 300         outsl((unsigned long) (p), (src), (count))
 301
 302 #define virt_to_bus     virt_to_phys
 303 #define bus_to_virt     phys_to_virt
 304
 305 #endif /* _ASM_TILE_IO_H */