spi-topcliff-pch: Fix issue for transmitting over 4KByte
[zen-stable.git] / arch / tile / include / hv / drv_mshim_intf.h
blobc6ef3bdc55cf5ce8b55dd3d3045d1c7d24ba2022
1 /*
2 * Copyright 2011 Tilera Corporation. All Rights Reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation, version 2.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
11 * NON INFRINGEMENT. See the GNU General Public License for
12 * more details.
15 /**
16 * @file drv_mshim_intf.h
17 * Interface definitions for the Linux EDAC memory controller driver.
20 #ifndef _SYS_HV_INCLUDE_DRV_MSHIM_INTF_H
21 #define _SYS_HV_INCLUDE_DRV_MSHIM_INTF_H
23 /** Number of memory controllers in the public API. */
24 #define TILE_MAX_MSHIMS 4
26 /** Memory info under each memory controller. */
27 struct mshim_mem_info
29 uint64_t mem_size; /**< Total memory size in bytes. */
30 uint8_t mem_type; /**< Memory type, DDR2 or DDR3. */
31 uint8_t mem_ecc; /**< Memory supports ECC. */
34 /**
35 * DIMM error structure.
36 * For now, only correctable errors are counted and the mshim doesn't record
37 * the error PA. HV takes panic upon uncorrectable errors.
39 struct mshim_mem_error
41 uint32_t sbe_count; /**< Number of single-bit errors. */
44 /** Read this offset to get the memory info per mshim. */
45 #define MSHIM_MEM_INFO_OFF 0x100
47 /** Read this offset to check DIMM error. */
48 #define MSHIM_MEM_ERROR_OFF 0x200
50 #endif /* _SYS_HV_INCLUDE_DRV_MSHIM_INTF_H */