include/linux/mfd/abx500/ab8500.h

   1 /*
   2  * Copyright (C) ST-Ericsson SA 2010
   3  *
   4  * License Terms: GNU General Public License v2
   5  * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
   6  */
   7 #ifndef MFD_AB8500_H
   8 #define MFD_AB8500_H
   9
  10 #include <linux/device.h>
  11
  12 /*
  13  * AB8500 bank addresses
  14  */
  15 #define AB8500_SYS_CTRL1_BLOCK  0x1
  16 #define AB8500_SYS_CTRL2_BLOCK  0x2
  17 #define AB8500_REGU_CTRL1       0x3
  18 #define AB8500_REGU_CTRL2       0x4
  19 #define AB8500_USB              0x5
  20 #define AB8500_TVOUT            0x6
  21 #define AB8500_DBI              0x7
  22 #define AB8500_ECI_AV_ACC       0x8
  23 #define AB8500_RESERVED         0x9
  24 #define AB8500_GPADC            0xA
  25 #define AB8500_CHARGER          0xB
  26 #define AB8500_GAS_GAUGE        0xC
  27 #define AB8500_AUDIO            0xD
  28 #define AB8500_INTERRUPT        0xE
  29 #define AB8500_RTC              0xF
  30 #define AB8500_MISC             0x10
  31 #define AB8500_DEVELOPMENT      0x11
  32 #define AB8500_DEBUG            0x12
  33 #define AB8500_PROD_TEST        0x13
  34 #define AB8500_OTP_EMUL         0x15
  35
  36 /*
  37  * Interrupts
  38  */
  39
  40 #define AB8500_INT_MAIN_EXT_CH_NOT_OK   0
  41 #define AB8500_INT_UN_PLUG_TV_DET       1
  42 #define AB8500_INT_PLUG_TV_DET          2
  43 #define AB8500_INT_TEMP_WARM            3
  44 #define AB8500_INT_PON_KEY2DB_F         4
  45 #define AB8500_INT_PON_KEY2DB_R         5
  46 #define AB8500_INT_PON_KEY1DB_F         6
  47 #define AB8500_INT_PON_KEY1DB_R         7
  48 #define AB8500_INT_BATT_OVV             8
  49 #define AB8500_INT_MAIN_CH_UNPLUG_DET   10
  50 #define AB8500_INT_MAIN_CH_PLUG_DET     11
  51 #define AB8500_INT_USB_ID_DET_F         12
  52 #define AB8500_INT_USB_ID_DET_R         13
  53 #define AB8500_INT_VBUS_DET_F           14
  54 #define AB8500_INT_VBUS_DET_R           15
  55 #define AB8500_INT_VBUS_CH_DROP_END     16
  56 #define AB8500_INT_RTC_60S              17
  57 #define AB8500_INT_RTC_ALARM            18
  58 #define AB8500_INT_BAT_CTRL_INDB        20
  59 #define AB8500_INT_CH_WD_EXP            21
  60 #define AB8500_INT_VBUS_OVV             22
  61 #define AB8500_INT_MAIN_CH_DROP_END     23
  62 #define AB8500_INT_CCN_CONV_ACC         24
  63 #define AB8500_INT_INT_AUD              25
  64 #define AB8500_INT_CCEOC                26
  65 #define AB8500_INT_CC_INT_CALIB         27
  66 #define AB8500_INT_LOW_BAT_F            28
  67 #define AB8500_INT_LOW_BAT_R            29
  68 #define AB8500_INT_BUP_CHG_NOT_OK       30
  69 #define AB8500_INT_BUP_CHG_OK           31
  70 #define AB8500_INT_GP_HW_ADC_CONV_END   32
  71 #define AB8500_INT_ACC_DETECT_1DB_F     33
  72 #define AB8500_INT_ACC_DETECT_1DB_R     34
  73 #define AB8500_INT_ACC_DETECT_22DB_F    35
  74 #define AB8500_INT_ACC_DETECT_22DB_R    36
  75 #define AB8500_INT_ACC_DETECT_21DB_F    37
  76 #define AB8500_INT_ACC_DETECT_21DB_R    38
  77 #define AB8500_INT_GP_SW_ADC_CONV_END   39
  78 #define AB8500_INT_GPIO6R               40
  79 #define AB8500_INT_GPIO7R               41
  80 #define AB8500_INT_GPIO8R               42
  81 #define AB8500_INT_GPIO9R               43
  82 #define AB8500_INT_GPIO10R              44
  83 #define AB8500_INT_GPIO11R              45
  84 #define AB8500_INT_GPIO12R              46
  85 #define AB8500_INT_GPIO13R              47
  86 #define AB8500_INT_GPIO24R              48
  87 #define AB8500_INT_GPIO25R              49
  88 #define AB8500_INT_GPIO36R              50
  89 #define AB8500_INT_GPIO37R              51
  90 #define AB8500_INT_GPIO38R              52
  91 #define AB8500_INT_GPIO39R              53
  92 #define AB8500_INT_GPIO40R              54
  93 #define AB8500_INT_GPIO41R              55
  94 #define AB8500_INT_GPIO6F               56
  95 #define AB8500_INT_GPIO7F               57
  96 #define AB8500_INT_GPIO8F               58
  97 #define AB8500_INT_GPIO9F               59
  98 #define AB8500_INT_GPIO10F              60
  99 #define AB8500_INT_GPIO11F              61
 100 #define AB8500_INT_GPIO12F              62
 101 #define AB8500_INT_GPIO13F              63
 102 #define AB8500_INT_GPIO24F              64
 103 #define AB8500_INT_GPIO25F              65
 104 #define AB8500_INT_GPIO36F              66
 105 #define AB8500_INT_GPIO37F              67
 106 #define AB8500_INT_GPIO38F              68
 107 #define AB8500_INT_GPIO39F              69
 108 #define AB8500_INT_GPIO40F              70
 109 #define AB8500_INT_GPIO41F              71
 110 #define AB8500_INT_ADP_SOURCE_ERROR     72
 111 #define AB8500_INT_ADP_SINK_ERROR       73
 112 #define AB8500_INT_ADP_PROBE_PLUG       74
 113 #define AB8500_INT_ADP_PROBE_UNPLUG     75
 114 #define AB8500_INT_ADP_SENSE_OFF        76
 115 #define AB8500_INT_USB_PHY_POWER_ERR    78
 116 #define AB8500_INT_USB_LINK_STATUS      79
 117 #define AB8500_INT_BTEMP_LOW            80
 118 #define AB8500_INT_BTEMP_LOW_MEDIUM     81
 119 #define AB8500_INT_BTEMP_MEDIUM_HIGH    82
 120 #define AB8500_INT_BTEMP_HIGH           83
 121 #define AB8500_INT_USB_CHARGER_NOT_OK   89
 122 #define AB8500_INT_ID_WAKEUP_R          90
 123 #define AB8500_INT_ID_DET_R1R           92
 124 #define AB8500_INT_ID_DET_R2R           93
 125 #define AB8500_INT_ID_DET_R3R           94
 126 #define AB8500_INT_ID_DET_R4R           95
 127 #define AB8500_INT_ID_WAKEUP_F          96
 128 #define AB8500_INT_ID_DET_R1F           98
 129 #define AB8500_INT_ID_DET_R2F           99
 130 #define AB8500_INT_ID_DET_R3F           100
 131 #define AB8500_INT_ID_DET_R4F           101
 132 #define AB8500_INT_USB_CHG_DET_DONE     102
 133 #define AB8500_INT_USB_CH_TH_PROT_F     104
 134 #define AB8500_INT_USB_CH_TH_PROT_R    105
 135 #define AB8500_INT_MAIN_CH_TH_PROT_F   106
 136 #define AB8500_INT_MAIN_CH_TH_PROT_R    107
 137 #define AB8500_INT_USB_CHARGER_NOT_OKF  111
 138
 139 #define AB8500_NR_IRQS                  112
 140 #define AB8500_NUM_IRQ_REGS             14
 141
 142 /**
 143  * struct ab8500 - ab8500 internal structure
 144  * @dev: parent device
 145  * @lock: read/write operations lock
 146  * @irq_lock: genirq bus lock
 147  * @irq: irq line
 148  * @chip_id: chip revision id
 149  * @write: register write
 150  * @read: register read
 151  * @rx_buf: rx buf for SPI
 152  * @tx_buf: tx buf for SPI
 153  * @mask: cache of IRQ regs for bus lock
 154  * @oldmask: cache of previous IRQ regs for bus lock
 155  */
 156 struct ab8500 {
 157         struct device   *dev;
 158         struct mutex    lock;
 159         struct mutex    irq_lock;
 160
 161         int             irq_base;
 162         int             irq;
 163         u8              chip_id;
 164
 165         int (*write) (struct ab8500 *a8500, u16 addr, u8 data);
 166         int (*read) (struct ab8500 *a8500, u16 addr);
 167
 168         unsigned long   tx_buf[4];
 169         unsigned long   rx_buf[4];
 170
 171         u8 mask[AB8500_NUM_IRQ_REGS];
 172         u8 oldmask[AB8500_NUM_IRQ_REGS];
 173 };
 174
 175 struct regulator_reg_init;
 176 struct regulator_init_data;
 177 struct ab8500_gpio_platform_data;
 178
 179 /**
 180  * struct ab8500_platform_data - AB8500 platform data
 181  * @irq_base: start of AB8500 IRQs, AB8500_NR_IRQS will be used
 182  * @init: board-specific initialization after detection of ab8500
 183  * @num_regulator_reg_init: number of regulator init registers
 184  * @regulator_reg_init: regulator init registers
 185  * @num_regulator: number of regulators
 186  * @regulator: machine-specific constraints for regulators
 187  */
 188 struct ab8500_platform_data {
 189         int irq_base;
 190         void (*init) (struct ab8500 *);
 191         int num_regulator_reg_init;
 192         struct ab8500_regulator_reg_init *regulator_reg_init;
 193         int num_regulator;
 194         struct regulator_init_data *regulator;
 195         struct ab8500_gpio_platform_data *gpio;
 196 };
 197
 198 extern int __devinit ab8500_init(struct ab8500 *ab8500);
 199 extern int __devexit ab8500_exit(struct ab8500 *ab8500);
 200
 201 #endif /* MFD_AB8500_H */