include/linux/serial_sci.h

   1 #ifndef __LINUX_SERIAL_SCI_H
   2 #define __LINUX_SERIAL_SCI_H
   3
   4 #include <linux/serial_core.h>
   5 #include <linux/sh_dma.h>
   6
   7 /*
   8  * Generic header for SuperH SCI(F) (used by sh/sh64/h8300 and related parts)
   9  */
  10
  11 #define SCIx_NOT_SUPPORTED      (-1)
  12
  13 enum {
  14         SCBRR_ALGO_1,           /* ((clk + 16 * bps) / (16 * bps) - 1) */
  15         SCBRR_ALGO_2,           /* ((clk + 16 * bps) / (32 * bps) - 1) */
  16         SCBRR_ALGO_3,           /* (((clk * 2) + 16 * bps) / (16 * bps) - 1) */
  17         SCBRR_ALGO_4,           /* (((clk * 2) + 16 * bps) / (32 * bps) - 1) */
  18         SCBRR_ALGO_5,           /* (((clk * 1000 / 32) / bps) - 1) */
  19 };
  20
  21 #define SCSCR_TIE       (1 << 7)
  22 #define SCSCR_RIE       (1 << 6)
  23 #define SCSCR_TE        (1 << 5)
  24 #define SCSCR_RE        (1 << 4)
  25 #define SCSCR_REIE      (1 << 3)        /* not supported by all parts */
  26 #define SCSCR_TOIE      (1 << 2)        /* not supported by all parts */
  27 #define SCSCR_CKE1      (1 << 1)
  28 #define SCSCR_CKE0      (1 << 0)
  29
  30 /* SCxSR SCI */
  31 #define SCI_TDRE  0x80
  32 #define SCI_RDRF  0x40
  33 #define SCI_ORER  0x20
  34 #define SCI_FER   0x10
  35 #define SCI_PER   0x08
  36 #define SCI_TEND  0x04
  37
  38 #define SCI_DEFAULT_ERROR_MASK (SCI_PER | SCI_FER)
  39
  40 /* SCxSR SCIF */
  41 #define SCIF_ER    0x0080
  42 #define SCIF_TEND  0x0040
  43 #define SCIF_TDFE  0x0020
  44 #define SCIF_BRK   0x0010
  45 #define SCIF_FER   0x0008
  46 #define SCIF_PER   0x0004
  47 #define SCIF_RDF   0x0002
  48 #define SCIF_DR    0x0001
  49
  50 #define SCIF_DEFAULT_ERROR_MASK (SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK)
  51
  52 /* SCSPTR, optional */
  53 #define SCSPTR_RTSIO    (1 << 7)
  54 #define SCSPTR_CTSIO    (1 << 5)
  55
  56 /* Offsets into the sci_port->irqs array */
  57 enum {
  58         SCIx_ERI_IRQ,
  59         SCIx_RXI_IRQ,
  60         SCIx_TXI_IRQ,
  61         SCIx_BRI_IRQ,
  62         SCIx_NR_IRQS,
  63
  64         SCIx_MUX_IRQ = SCIx_NR_IRQS,    /* special case */
  65 };
  66
  67 /* Offsets into the sci_port->gpios array */
  68 enum {
  69         SCIx_SCK,
  70         SCIx_RXD,
  71         SCIx_TXD,
  72         SCIx_CTS,
  73         SCIx_RTS,
  74
  75         SCIx_NR_FNS,
  76 };
  77
  78 enum {
  79         SCIx_PROBE_REGTYPE,
  80
  81         SCIx_SCI_REGTYPE,
  82         SCIx_IRDA_REGTYPE,
  83         SCIx_SCIFA_REGTYPE,
  84         SCIx_SCIFB_REGTYPE,
  85         SCIx_SH2_SCIF_FIFODATA_REGTYPE,
  86         SCIx_SH3_SCIF_REGTYPE,
  87         SCIx_SH4_SCIF_REGTYPE,
  88         SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
  89         SCIx_SH4_SCIF_FIFODATA_REGTYPE,
  90         SCIx_SH7705_SCIF_REGTYPE,
  91
  92         SCIx_NR_REGTYPES,
  93 };
  94
  95 #define SCIx_IRQ_MUXED(irq)             \
  96 {                                       \
  97         [SCIx_ERI_IRQ]  = (irq),        \
  98         [SCIx_RXI_IRQ]  = (irq),        \
  99         [SCIx_TXI_IRQ]  = (irq),        \
 100         [SCIx_BRI_IRQ]  = (irq),        \
 101 }
 102
 103 #define SCIx_IRQ_IS_MUXED(port)                 \
 104         ((port)->cfg->irqs[SCIx_ERI_IRQ] ==     \
 105          (port)->cfg->irqs[SCIx_RXI_IRQ]) ||    \
 106         ((port)->cfg->irqs[SCIx_ERI_IRQ] &&     \
 107          !(port)->cfg->irqs[SCIx_RXI_IRQ])
 108 /*
 109  * SCI register subset common for all port types.
 110  * Not all registers will exist on all parts.
 111  */
 112 enum {
 113         SCSMR, SCBRR, SCSCR, SCxSR,
 114         SCFCR, SCFDR, SCxTDR, SCxRDR,
 115         SCLSR, SCTFDR, SCRFDR, SCSPTR,
 116
 117         SCIx_NR_REGS,
 118 };
 119
 120 struct device;
 121
 122 struct plat_sci_port_ops {
 123         void (*init_pins)(struct uart_port *, unsigned int cflag);
 124 };
 125
 126 /*
 127  * Port-specific capabilities
 128  */
 129 #define SCIx_HAVE_RTSCTS        (1 << 0)
 130
 131 /*
 132  * Platform device specific platform_data struct
 133  */
 134 struct plat_sci_port {
 135         unsigned long   mapbase;                /* resource base */
 136         unsigned int    irqs[SCIx_NR_IRQS];     /* ERI, RXI, TXI, BRI */
 137         unsigned int    gpios[SCIx_NR_FNS];     /* SCK, RXD, TXD, CTS, RTS */
 138         unsigned int    type;                   /* SCI / SCIF / IRDA */
 139         upf_t           flags;                  /* UPF_* flags */
 140         unsigned long   capabilities;           /* Port features/capabilities */
 141
 142         unsigned int    scbrr_algo_id;          /* SCBRR calculation algo */
 143         unsigned int    scscr;                  /* SCSCR initialization */
 144
 145         /*
 146          * Platform overrides if necessary, defaults otherwise.
 147          */
 148         int             overrun_bit;
 149         unsigned int    error_mask;
 150
 151         int             port_reg;
 152         unsigned char   regshift;
 153         unsigned char   regtype;
 154
 155         struct plat_sci_port_ops        *ops;
 156
 157         unsigned int    dma_slave_tx;
 158         unsigned int    dma_slave_rx;
 159 };
 160
 161 #endif /* __LINUX_SERIAL_SCI_H */