include/linux/ssb/ssb.h

   1 #ifndef LINUX_SSB_H_
   2 #define LINUX_SSB_H_
   3
   4 #include <linux/device.h>
   5 #include <linux/list.h>
   6 #include <linux/types.h>
   7 #include <linux/spinlock.h>
   8 #include <linux/pci.h>
   9 #include <linux/mod_devicetable.h>
  10 #include <linux/dma-mapping.h>
  11
  12 #include <linux/ssb/ssb_regs.h>
  13
  14
  15 struct pcmcia_device;
  16 struct ssb_bus;
  17 struct ssb_driver;
  18
  19 struct ssb_sprom {
  20         u8 revision;
  21         u8 il0mac[6];           /* MAC address for 802.11b/g */
  22         u8 et0mac[6];           /* MAC address for Ethernet */
  23         u8 et1mac[6];           /* MAC address for 802.11a */
  24         u8 et0phyaddr;          /* MII address for enet0 */
  25         u8 et1phyaddr;          /* MII address for enet1 */
  26         u8 et0mdcport;          /* MDIO for enet0 */
  27         u8 et1mdcport;          /* MDIO for enet1 */
  28         u16 board_rev;          /* Board revision number from SPROM. */
  29         u8 country_code;        /* Country Code */
  30         u16 leddc_on_time;      /* LED Powersave Duty Cycle On Count */
  31         u16 leddc_off_time;     /* LED Powersave Duty Cycle Off Count */
  32         u8 ant_available_a;     /* 2GHz antenna available bits (up to 4) */
  33         u8 ant_available_bg;    /* 5GHz antenna available bits (up to 4) */
  34         u16 pa0b0;
  35         u16 pa0b1;
  36         u16 pa0b2;
  37         u16 pa1b0;
  38         u16 pa1b1;
  39         u16 pa1b2;
  40         u16 pa1lob0;
  41         u16 pa1lob1;
  42         u16 pa1lob2;
  43         u16 pa1hib0;
  44         u16 pa1hib1;
  45         u16 pa1hib2;
  46         u8 gpio0;               /* GPIO pin 0 */
  47         u8 gpio1;               /* GPIO pin 1 */
  48         u8 gpio2;               /* GPIO pin 2 */
  49         u8 gpio3;               /* GPIO pin 3 */
  50         u16 maxpwr_bg;          /* 2.4GHz Amplifier Max Power (in dBm Q5.2) */
  51         u16 maxpwr_al;          /* 5.2GHz Amplifier Max Power (in dBm Q5.2) */
  52         u16 maxpwr_a;           /* 5.3GHz Amplifier Max Power (in dBm Q5.2) */
  53         u16 maxpwr_ah;          /* 5.8GHz Amplifier Max Power (in dBm Q5.2) */
  54         u8 itssi_a;             /* Idle TSSI Target for A-PHY */
  55         u8 itssi_bg;            /* Idle TSSI Target for B/G-PHY */
  56         u8 tri2g;               /* 2.4GHz TX isolation */
  57         u8 tri5gl;              /* 5.2GHz TX isolation */
  58         u8 tri5g;               /* 5.3GHz TX isolation */
  59         u8 tri5gh;              /* 5.8GHz TX isolation */
  60         u8 txpid2g[4];          /* 2GHz TX power index */
  61         u8 txpid5gl[4];         /* 4.9 - 5.1GHz TX power index */
  62         u8 txpid5g[4];          /* 5.1 - 5.5GHz TX power index */
  63         u8 txpid5gh[4];         /* 5.5 - ...GHz TX power index */
  64         u8 rxpo2g;              /* 2GHz RX power offset */
  65         u8 rxpo5g;              /* 5GHz RX power offset */
  66         u8 rssisav2g;           /* 2GHz RSSI params */
  67         u8 rssismc2g;
  68         u8 rssismf2g;
  69         u8 bxa2g;               /* 2GHz BX arch */
  70         u8 rssisav5g;           /* 5GHz RSSI params */
  71         u8 rssismc5g;
  72         u8 rssismf5g;
  73         u8 bxa5g;               /* 5GHz BX arch */
  74         u16 cck2gpo;            /* CCK power offset */
  75         u32 ofdm2gpo;           /* 2.4GHz OFDM power offset */
  76         u32 ofdm5glpo;          /* 5.2GHz OFDM power offset */
  77         u32 ofdm5gpo;           /* 5.3GHz OFDM power offset */
  78         u32 ofdm5ghpo;          /* 5.8GHz OFDM power offset */
  79         u16 boardflags_lo;      /* Board flags (bits 0-15) */
  80         u16 boardflags_hi;      /* Board flags (bits 16-31) */
  81         u16 boardflags2_lo;     /* Board flags (bits 32-47) */
  82         u16 boardflags2_hi;     /* Board flags (bits 48-63) */
  83         /* TODO store board flags in a single u64 */
  84
  85         /* Antenna gain values for up to 4 antennas
  86          * on each band. Values in dBm/4 (Q5.2). Negative gain means the
  87          * loss in the connectors is bigger than the gain. */
  88         struct {
  89                 struct {
  90                         s8 a0, a1, a2, a3;
  91                 } ghz24;        /* 2.4GHz band */
  92                 struct {
  93                         s8 a0, a1, a2, a3;
  94                 } ghz5;         /* 5GHz band */
  95         } antenna_gain;
  96
  97         struct {
  98                 struct {
  99                         u8 tssipos, extpa_gain, pdet_range, tr_iso, antswlut;
 100                 } ghz2;
 101                 struct {
 102                         u8 tssipos, extpa_gain, pdet_range, tr_iso, antswlut;
 103                 } ghz5;
 104         } fem;
 105
 106         /* TODO - add any parameters needed from rev 2, 3, 4, 5 or 8 SPROMs */
 107 };
 108
 109 /* Information about the PCB the circuitry is soldered on. */
 110 struct ssb_boardinfo {
 111         u16 vendor;
 112         u16 type;
 113         u8  rev;
 114 };
 115
 116
 117 struct ssb_device;
 118 /* Lowlevel read/write operations on the device MMIO.
 119  * Internal, don't use that outside of ssb. */
 120 struct ssb_bus_ops {
 121         u8 (*read8)(struct ssb_device *dev, u16 offset);
 122         u16 (*read16)(struct ssb_device *dev, u16 offset);
 123         u32 (*read32)(struct ssb_device *dev, u16 offset);
 124         void (*write8)(struct ssb_device *dev, u16 offset, u8 value);
 125         void (*write16)(struct ssb_device *dev, u16 offset, u16 value);
 126         void (*write32)(struct ssb_device *dev, u16 offset, u32 value);
 127 #ifdef CONFIG_SSB_BLOCKIO
 128         void (*block_read)(struct ssb_device *dev, void *buffer,
 129                            size_t count, u16 offset, u8 reg_width);
 130         void (*block_write)(struct ssb_device *dev, const void *buffer,
 131                             size_t count, u16 offset, u8 reg_width);
 132 #endif
 133 };
 134
 135
 136 /* Core-ID values. */
 137 #define SSB_DEV_CHIPCOMMON      0x800
 138 #define SSB_DEV_ILINE20         0x801
 139 #define SSB_DEV_SDRAM           0x803
 140 #define SSB_DEV_PCI             0x804
 141 #define SSB_DEV_MIPS            0x805
 142 #define SSB_DEV_ETHERNET        0x806
 143 #define SSB_DEV_V90             0x807
 144 #define SSB_DEV_USB11_HOSTDEV   0x808
 145 #define SSB_DEV_ADSL            0x809
 146 #define SSB_DEV_ILINE100        0x80A
 147 #define SSB_DEV_IPSEC           0x80B
 148 #define SSB_DEV_PCMCIA          0x80D
 149 #define SSB_DEV_INTERNAL_MEM    0x80E
 150 #define SSB_DEV_MEMC_SDRAM      0x80F
 151 #define SSB_DEV_EXTIF           0x811
 152 #define SSB_DEV_80211           0x812
 153 #define SSB_DEV_MIPS_3302       0x816
 154 #define SSB_DEV_USB11_HOST      0x817
 155 #define SSB_DEV_USB11_DEV       0x818
 156 #define SSB_DEV_USB20_HOST      0x819
 157 #define SSB_DEV_USB20_DEV       0x81A
 158 #define SSB_DEV_SDIO_HOST       0x81B
 159 #define SSB_DEV_ROBOSWITCH      0x81C
 160 #define SSB_DEV_PARA_ATA        0x81D
 161 #define SSB_DEV_SATA_XORDMA     0x81E
 162 #define SSB_DEV_ETHERNET_GBIT   0x81F
 163 #define SSB_DEV_PCIE            0x820
 164 #define SSB_DEV_MIMO_PHY        0x821
 165 #define SSB_DEV_SRAM_CTRLR      0x822
 166 #define SSB_DEV_MINI_MACPHY     0x823
 167 #define SSB_DEV_ARM_1176        0x824
 168 #define SSB_DEV_ARM_7TDMI       0x825
 169
 170 /* Vendor-ID values */
 171 #define SSB_VENDOR_BROADCOM     0x4243
 172
 173 /* Some kernel subsystems poke with dev->drvdata, so we must use the
 174  * following ugly workaround to get from struct device to struct ssb_device */
 175 struct __ssb_dev_wrapper {
 176         struct device dev;
 177         struct ssb_device *sdev;
 178 };
 179
 180 struct ssb_device {
 181         /* Having a copy of the ops pointer in each dev struct
 182          * is an optimization. */
 183         const struct ssb_bus_ops *ops;
 184
 185         struct device *dev, *dma_dev;
 186
 187         struct ssb_bus *bus;
 188         struct ssb_device_id id;
 189
 190         u8 core_index;
 191         unsigned int irq;
 192
 193         /* Internal-only stuff follows. */
 194         void *drvdata;          /* Per-device data */
 195         void *devtypedata;      /* Per-devicetype (eg 802.11) data */
 196 };
 197
 198 /* Go from struct device to struct ssb_device. */
 199 static inline
 200 struct ssb_device * dev_to_ssb_dev(struct device *dev)
 201 {
 202         struct __ssb_dev_wrapper *wrap;
 203         wrap = container_of(dev, struct __ssb_dev_wrapper, dev);
 204         return wrap->sdev;
 205 }
 206
 207 /* Device specific user data */
 208 static inline
 209 void ssb_set_drvdata(struct ssb_device *dev, void *data)
 210 {
 211         dev->drvdata = data;
 212 }
 213 static inline
 214 void * ssb_get_drvdata(struct ssb_device *dev)
 215 {
 216         return dev->drvdata;
 217 }
 218
 219 /* Devicetype specific user data. This is per device-type (not per device) */
 220 void ssb_set_devtypedata(struct ssb_device *dev, void *data);
 221 static inline
 222 void * ssb_get_devtypedata(struct ssb_device *dev)
 223 {
 224         return dev->devtypedata;
 225 }
 226
 227
 228 struct ssb_driver {
 229         const char *name;
 230         const struct ssb_device_id *id_table;
 231
 232         int (*probe)(struct ssb_device *dev, const struct ssb_device_id *id);
 233         void (*remove)(struct ssb_device *dev);
 234         int (*suspend)(struct ssb_device *dev, pm_message_t state);
 235         int (*resume)(struct ssb_device *dev);
 236         void (*shutdown)(struct ssb_device *dev);
 237
 238         struct device_driver drv;
 239 };
 240 #define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv)
 241
 242 extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner);
 243 #define ssb_driver_register(drv) \
 244         __ssb_driver_register(drv, THIS_MODULE)
 245
 246 extern void ssb_driver_unregister(struct ssb_driver *drv);
 247
 248
 249
 250
 251 enum ssb_bustype {
 252         SSB_BUSTYPE_SSB,        /* This SSB bus is the system bus */
 253         SSB_BUSTYPE_PCI,        /* SSB is connected to PCI bus */
 254         SSB_BUSTYPE_PCMCIA,     /* SSB is connected to PCMCIA bus */
 255         SSB_BUSTYPE_SDIO,       /* SSB is connected to SDIO bus */
 256 };
 257
 258 /* board_vendor */
 259 #define SSB_BOARDVENDOR_BCM     0x14E4  /* Broadcom */
 260 #define SSB_BOARDVENDOR_DELL    0x1028  /* Dell */
 261 #define SSB_BOARDVENDOR_HP      0x0E11  /* HP */
 262 /* board_type */
 263 #define SSB_BOARD_BCM94306MP    0x0418
 264 #define SSB_BOARD_BCM4309G      0x0421
 265 #define SSB_BOARD_BCM4306CB     0x0417
 266 #define SSB_BOARD_BCM4309MP     0x040C
 267 #define SSB_BOARD_MP4318        0x044A
 268 #define SSB_BOARD_BU4306        0x0416
 269 #define SSB_BOARD_BU4309        0x040A
 270 /* chip_package */
 271 #define SSB_CHIPPACK_BCM4712S   1       /* Small 200pin 4712 */
 272 #define SSB_CHIPPACK_BCM4712M   2       /* Medium 225pin 4712 */
 273 #define SSB_CHIPPACK_BCM4712L   0       /* Large 340pin 4712 */
 274
 275 #include <linux/ssb/ssb_driver_chipcommon.h>
 276 #include <linux/ssb/ssb_driver_mips.h>
 277 #include <linux/ssb/ssb_driver_extif.h>
 278 #include <linux/ssb/ssb_driver_pci.h>
 279
 280 struct ssb_bus {
 281         /* The MMIO area. */
 282         void __iomem *mmio;
 283
 284         const struct ssb_bus_ops *ops;
 285
 286         /* The core currently mapped into the MMIO window.
 287          * Not valid on all host-buses. So don't use outside of SSB. */
 288         struct ssb_device *mapped_device;
 289         union {
 290                 /* Currently mapped PCMCIA segment. (bustype == SSB_BUSTYPE_PCMCIA only) */
 291                 u8 mapped_pcmcia_seg;
 292                 /* Current SSB base address window for SDIO. */
 293                 u32 sdio_sbaddr;
 294         };
 295         /* Lock for core and segment switching.
 296          * On PCMCIA-host busses this is used to protect the whole MMIO access. */
 297         spinlock_t bar_lock;
 298
 299         /* The host-bus this backplane is running on. */
 300         enum ssb_bustype bustype;
 301         /* Pointers to the host-bus. Check bustype before using any of these pointers. */
 302         union {
 303                 /* Pointer to the PCI bus (only valid if bustype == SSB_BUSTYPE_PCI). */
 304                 struct pci_dev *host_pci;
 305                 /* Pointer to the PCMCIA device (only if bustype == SSB_BUSTYPE_PCMCIA). */
 306                 struct pcmcia_device *host_pcmcia;
 307                 /* Pointer to the SDIO device (only if bustype == SSB_BUSTYPE_SDIO). */
 308                 struct sdio_func *host_sdio;
 309         };
 310
 311         /* See enum ssb_quirks */
 312         unsigned int quirks;
 313
 314 #ifdef CONFIG_SSB_SPROM
 315         /* Mutex to protect the SPROM writing. */
 316         struct mutex sprom_mutex;
 317 #endif
 318
 319         /* ID information about the Chip. */
 320         u16 chip_id;
 321         u8 chip_rev;
 322         u16 sprom_offset;
 323         u16 sprom_size;         /* number of words in sprom */
 324         u8 chip_package;
 325
 326         /* List of devices (cores) on the backplane. */
 327         struct ssb_device devices[SSB_MAX_NR_CORES];
 328         u8 nr_devices;
 329
 330         /* Software ID number for this bus. */
 331         unsigned int busnumber;
 332
 333         /* The ChipCommon device (if available). */
 334         struct ssb_chipcommon chipco;
 335         /* The PCI-core device (if available). */
 336         struct ssb_pcicore pcicore;
 337         /* The MIPS-core device (if available). */
 338         struct ssb_mipscore mipscore;
 339         /* The EXTif-core device (if available). */
 340         struct ssb_extif extif;
 341
 342         /* The following structure elements are not available in early
 343          * SSB initialization. Though, they are available for regular
 344          * registered drivers at any stage. So be careful when
 345          * using them in the ssb core code. */
 346
 347         /* ID information about the PCB. */
 348         struct ssb_boardinfo boardinfo;
 349         /* Contents of the SPROM. */
 350         struct ssb_sprom sprom;
 351         /* If the board has a cardbus slot, this is set to true. */
 352         bool has_cardbus_slot;
 353
 354 #ifdef CONFIG_SSB_EMBEDDED
 355         /* Lock for GPIO register access. */
 356         spinlock_t gpio_lock;
 357 #endif /* EMBEDDED */
 358
 359         /* Internal-only stuff follows. Do not touch. */
 360         struct list_head list;
 361 #ifdef CONFIG_SSB_DEBUG
 362         /* Is the bus already powered up? */
 363         bool powered_up;
 364         int power_warn_count;
 365 #endif /* DEBUG */
 366 };
 367
 368 enum ssb_quirks {
 369         /* SDIO connected card requires performing a read after writing a 32-bit value */
 370         SSB_QUIRK_SDIO_READ_AFTER_WRITE32       = (1 << 0),
 371 };
 372
 373 /* The initialization-invariants. */
 374 struct ssb_init_invariants {
 375         /* Versioning information about the PCB. */
 376         struct ssb_boardinfo boardinfo;
 377         /* The SPROM information. That's either stored in an
 378          * EEPROM or NVRAM on the board. */
 379         struct ssb_sprom sprom;
 380         /* If the board has a cardbus slot, this is set to true. */
 381         bool has_cardbus_slot;
 382 };
 383 /* Type of function to fetch the invariants. */
 384 typedef int (*ssb_invariants_func_t)(struct ssb_bus *bus,
 385                                      struct ssb_init_invariants *iv);
 386
 387 /* Register a SSB system bus. get_invariants() is called after the
 388  * basic system devices are initialized.
 389  * The invariants are usually fetched from some NVRAM.
 390  * Put the invariants into the struct pointed to by iv. */
 391 extern int ssb_bus_ssbbus_register(struct ssb_bus *bus,
 392                                    unsigned long baseaddr,
 393                                    ssb_invariants_func_t get_invariants);
 394 #ifdef CONFIG_SSB_PCIHOST
 395 extern int ssb_bus_pcibus_register(struct ssb_bus *bus,
 396                                    struct pci_dev *host_pci);
 397 #endif /* CONFIG_SSB_PCIHOST */
 398 #ifdef CONFIG_SSB_PCMCIAHOST
 399 extern int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
 400                                       struct pcmcia_device *pcmcia_dev,
 401                                       unsigned long baseaddr);
 402 #endif /* CONFIG_SSB_PCMCIAHOST */
 403 #ifdef CONFIG_SSB_SDIOHOST
 404 extern int ssb_bus_sdiobus_register(struct ssb_bus *bus,
 405                                     struct sdio_func *sdio_func,
 406                                     unsigned int quirks);
 407 #endif /* CONFIG_SSB_SDIOHOST */
 408
 409
 410 extern void ssb_bus_unregister(struct ssb_bus *bus);
 411
 412 /* Does the device have an SPROM? */
 413 extern bool ssb_is_sprom_available(struct ssb_bus *bus);
 414
 415 /* Set a fallback SPROM.
 416  * See kdoc at the function definition for complete documentation. */
 417 extern int ssb_arch_register_fallback_sprom(
 418                 int (*sprom_callback)(struct ssb_bus *bus,
 419                 struct ssb_sprom *out));
 420
 421 /* Suspend a SSB bus.
 422  * Call this from the parent bus suspend routine. */
 423 extern int ssb_bus_suspend(struct ssb_bus *bus);
 424 /* Resume a SSB bus.
 425  * Call this from the parent bus resume routine. */
 426 extern int ssb_bus_resume(struct ssb_bus *bus);
 427
 428 extern u32 ssb_clockspeed(struct ssb_bus *bus);
 429
 430 /* Is the device enabled in hardware? */
 431 int ssb_device_is_enabled(struct ssb_device *dev);
 432 /* Enable a device and pass device-specific SSB_TMSLOW flags.
 433  * If no device-specific flags are available, use 0. */
 434 void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags);
 435 /* Disable a device in hardware and pass SSB_TMSLOW flags (if any). */
 436 void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags);
 437
 438
 439 /* Device MMIO register read/write functions. */
 440 static inline u8 ssb_read8(struct ssb_device *dev, u16 offset)
 441 {
 442         return dev->ops->read8(dev, offset);
 443 }
 444 static inline u16 ssb_read16(struct ssb_device *dev, u16 offset)
 445 {
 446         return dev->ops->read16(dev, offset);
 447 }
 448 static inline u32 ssb_read32(struct ssb_device *dev, u16 offset)
 449 {
 450         return dev->ops->read32(dev, offset);
 451 }
 452 static inline void ssb_write8(struct ssb_device *dev, u16 offset, u8 value)
 453 {
 454         dev->ops->write8(dev, offset, value);
 455 }
 456 static inline void ssb_write16(struct ssb_device *dev, u16 offset, u16 value)
 457 {
 458         dev->ops->write16(dev, offset, value);
 459 }
 460 static inline void ssb_write32(struct ssb_device *dev, u16 offset, u32 value)
 461 {
 462         dev->ops->write32(dev, offset, value);
 463 }
 464 #ifdef CONFIG_SSB_BLOCKIO
 465 static inline void ssb_block_read(struct ssb_device *dev, void *buffer,
 466                                   size_t count, u16 offset, u8 reg_width)
 467 {
 468         dev->ops->block_read(dev, buffer, count, offset, reg_width);
 469 }
 470
 471 static inline void ssb_block_write(struct ssb_device *dev, const void *buffer,
 472                                    size_t count, u16 offset, u8 reg_width)
 473 {
 474         dev->ops->block_write(dev, buffer, count, offset, reg_width);
 475 }
 476 #endif /* CONFIG_SSB_BLOCKIO */
 477
 478
 479 /* The SSB DMA API. Use this API for any DMA operation on the device.
 480  * This API basically is a wrapper that calls the correct DMA API for
 481  * the host device type the SSB device is attached to. */
 482
 483 /* Translation (routing) bits that need to be ORed to DMA
 484  * addresses before they are given to a device. */
 485 extern u32 ssb_dma_translation(struct ssb_device *dev);
 486 #define SSB_DMA_TRANSLATION_MASK        0xC0000000
 487 #define SSB_DMA_TRANSLATION_SHIFT       30
 488
 489 static inline void __cold __ssb_dma_not_implemented(struct ssb_device *dev)
 490 {
 491 #ifdef CONFIG_SSB_DEBUG
 492         printk(KERN_ERR "SSB: BUG! Calling DMA API for "
 493                "unsupported bustype %d\n", dev->bus->bustype);
 494 #endif /* DEBUG */
 495 }
 496
 497 #ifdef CONFIG_SSB_PCIHOST
 498 /* PCI-host wrapper driver */
 499 extern int ssb_pcihost_register(struct pci_driver *driver);
 500 static inline void ssb_pcihost_unregister(struct pci_driver *driver)
 501 {
 502         pci_unregister_driver(driver);
 503 }
 504
 505 static inline
 506 void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state)
 507 {
 508         if (sdev->bus->bustype == SSB_BUSTYPE_PCI)
 509                 pci_set_power_state(sdev->bus->host_pci, state);
 510 }
 511 #else
 512 static inline void ssb_pcihost_unregister(struct pci_driver *driver)
 513 {
 514 }
 515
 516 static inline
 517 void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state)
 518 {
 519 }
 520 #endif /* CONFIG_SSB_PCIHOST */
 521
 522
 523 /* If a driver is shutdown or suspended, call this to signal
 524  * that the bus may be completely powered down. SSB will decide,
 525  * if it's really time to power down the bus, based on if there
 526  * are other devices that want to run. */
 527 extern int ssb_bus_may_powerdown(struct ssb_bus *bus);
 528 /* Before initializing and enabling a device, call this to power-up the bus.
 529  * If you want to allow use of dynamic-power-control, pass the flag.
 530  * Otherwise static always-on powercontrol will be used. */
 531 extern int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl);
 532
 533 extern void ssb_commit_settings(struct ssb_bus *bus);
 534
 535 /* Various helper functions */
 536 extern u32 ssb_admatch_base(u32 adm);
 537 extern u32 ssb_admatch_size(u32 adm);
 538
 539 /* PCI device mapping and fixup routines.
 540  * Called from the architecture pcibios init code.
 541  * These are only available on SSB_EMBEDDED configurations. */
 542 #ifdef CONFIG_SSB_EMBEDDED
 543 int ssb_pcibios_plat_dev_init(struct pci_dev *dev);
 544 int ssb_pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
 545 #endif /* CONFIG_SSB_EMBEDDED */
 546
 547 #endif /* LINUX_SSB_H_ */