Staging: hv: mousevsc: Change the allocation flags to reflect interrupt context
[zen-stable.git] / arch / sparc / include / asm / head_32.h
blob7c35491a8b53d387ac477305fbed04092e68ee76
1 #ifndef __SPARC_HEAD_H
2 #define __SPARC_HEAD_H
4 #define KERNBASE 0xf0000000 /* First address the kernel will eventually be */
5 #define LOAD_ADDR 0x4000 /* prom jumps to us here unless this is elf /boot */
6 #define SUN4C_SEGSZ (1 << 18)
7 #define SRMMU_L1_KBASE_OFFSET ((KERNBASE>>24)<<2) /* Used in boot remapping. */
8 #define INTS_ENAB 0x01 /* entry.S uses this. */
10 #define SUN4_PROM_VECTOR 0xFFE81000 /* SUN4 PROM needs to be hardwired */
12 #define WRITE_PAUSE nop; nop; nop; /* Have to do this after %wim/%psr chg */
13 #define NOP_INSN 0x01000000 /* Used to patch sparc_save_state */
15 /* Here are some trap goodies */
17 /* Generic trap entry. */
18 #define TRAP_ENTRY(type, label) \
19 rd %psr, %l0; b label; rd %wim, %l3; nop;
21 /* Data/text faults. Defaults to sun4c version at boot time. */
22 #define SPARC_TFAULT rd %psr, %l0; rd %wim, %l3; b sun4c_fault; mov 1, %l7;
23 #define SPARC_DFAULT rd %psr, %l0; rd %wim, %l3; b sun4c_fault; mov 0, %l7;
24 #define SRMMU_TFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 1, %l7;
25 #define SRMMU_DFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 0, %l7;
27 /* This is for traps we should NEVER get. */
28 #define BAD_TRAP(num) \
29 rd %psr, %l0; mov num, %l7; b bad_trap_handler; rd %wim, %l3;
31 /* This is for traps when we want just skip the instruction which caused it */
32 #define SKIP_TRAP(type, name) \
33 jmpl %l2, %g0; rett %l2 + 4; nop; nop;
35 /* Notice that for the system calls we pull a trick. We load up a
36 * different pointer to the system call vector table in %l7, but call
37 * the same generic system call low-level entry point. The trap table
38 * entry sequences are also HyperSparc pipeline friendly ;-)
41 /* Software trap for Linux system calls. */
42 #define LINUX_SYSCALL_TRAP \
43 sethi %hi(sys_call_table), %l7; \
44 or %l7, %lo(sys_call_table), %l7; \
45 b linux_sparc_syscall; \
46 rd %psr, %l0;
48 #define BREAKPOINT_TRAP \
49 b breakpoint_trap; \
50 rd %psr,%l0; \
51 nop; \
52 nop;
54 #ifdef CONFIG_KGDB
55 #define KGDB_TRAP(num) \
56 b kgdb_trap_low; \
57 rd %psr,%l0; \
58 nop; \
59 nop;
60 #else
61 #define KGDB_TRAP(num) \
62 BAD_TRAP(num)
63 #endif
65 /* The Get Condition Codes software trap for userland. */
66 #define GETCC_TRAP \
67 b getcc_trap_handler; mov %psr, %l0; nop; nop;
69 /* The Set Condition Codes software trap for userland. */
70 #define SETCC_TRAP \
71 b setcc_trap_handler; mov %psr, %l0; nop; nop;
73 /* The Get PSR software trap for userland. */
74 #define GETPSR_TRAP \
75 mov %psr, %i0; jmp %l2; rett %l2 + 4; nop;
77 /* This is for hard interrupts from level 1-14, 15 is non-maskable (nmi) and
78 * gets handled with another macro.
80 #define TRAP_ENTRY_INTERRUPT(int_level) \
81 mov int_level, %l7; rd %psr, %l0; b real_irq_entry; rd %wim, %l3;
83 /* NMI's (Non Maskable Interrupts) are special, you can't keep them
84 * from coming in, and basically if you get one, the shows over. ;(
85 * On the sun4c they are usually asynchronous memory errors, on the
86 * the sun4m they could be either due to mem errors or a software
87 * initiated interrupt from the prom/kern on an SMP box saying "I
88 * command you to do CPU tricks, read your mailbox for more info."
90 #define NMI_TRAP \
91 rd %wim, %l3; b linux_trap_nmi_sun4c; mov %psr, %l0; nop;
93 /* Window overflows/underflows are special and we need to try to be as
94 * efficient as possible here....
96 #define WINDOW_SPILL \
97 rd %psr, %l0; rd %wim, %l3; b spill_window_entry; andcc %l0, PSR_PS, %g0;
99 #define WINDOW_FILL \
100 rd %psr, %l0; rd %wim, %l3; b fill_window_entry; andcc %l0, PSR_PS, %g0;
102 #endif /* __SPARC_HEAD_H */