Staging: hv: mousevsc: Change the allocation flags to reflect interrupt context
[zen-stable.git] / arch / sparc / include / asm / uctx.h
blobdc937c75ffdda5955f91fbf841732a05aa5d56a1
1 /*
2 * uctx.h: Sparc64 {set,get}context() register state layouts.
4 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
5 */
7 #ifndef __SPARC64_UCTX_H
8 #define __SPARC64_UCTX_H
10 #define MC_TSTATE 0
11 #define MC_PC 1
12 #define MC_NPC 2
13 #define MC_Y 3
14 #define MC_G1 4
15 #define MC_G2 5
16 #define MC_G3 6
17 #define MC_G4 7
18 #define MC_G5 8
19 #define MC_G6 9
20 #define MC_G7 10
21 #define MC_O0 11
22 #define MC_O1 12
23 #define MC_O2 13
24 #define MC_O3 14
25 #define MC_O4 15
26 #define MC_O5 16
27 #define MC_O6 17
28 #define MC_O7 18
29 #define MC_NGREG 19
31 typedef unsigned long mc_greg_t;
32 typedef mc_greg_t mc_gregset_t[MC_NGREG];
34 #define MC_MAXFPQ 16
35 struct mc_fq {
36 unsigned long *mcfq_addr;
37 unsigned int mcfq_insn;
40 struct mc_fpu {
41 union {
42 unsigned int sregs[32];
43 unsigned long dregs[32];
44 long double qregs[16];
45 } mcfpu_fregs;
46 unsigned long mcfpu_fsr;
47 unsigned long mcfpu_fprs;
48 unsigned long mcfpu_gsr;
49 struct mc_fq *mcfpu_fq;
50 unsigned char mcfpu_qcnt;
51 unsigned char mcfpu_qentsz;
52 unsigned char mcfpu_enab;
54 typedef struct mc_fpu mc_fpu_t;
56 typedef struct {
57 mc_gregset_t mc_gregs;
58 mc_greg_t mc_fp;
59 mc_greg_t mc_i7;
60 mc_fpu_t mc_fpregs;
61 } mcontext_t;
63 struct ucontext {
64 struct ucontext *uc_link;
65 unsigned long uc_flags;
66 sigset_t uc_sigmask;
67 mcontext_t uc_mcontext;
69 typedef struct ucontext ucontext_t;
71 #endif /* __SPARC64_UCTX_H */