spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / arm / boot / dts / imx53-ard.dts
blob2dccce46ed81c7f2018423e7cc1231e8b2ff6df5
1 /*
2  * Copyright 2011 Freescale Semiconductor, Inc.
3  * Copyright 2011 Linaro Ltd.
4  *
5  * The code contained herein is licensed under the GNU General Public
6  * License. You may obtain a copy of the GNU General Public License
7  * Version 2 or later at the following locations:
8  *
9  * http://www.opensource.org/licenses/gpl-license.html
10  * http://www.gnu.org/copyleft/gpl.html
11  */
13 /dts-v1/;
14 /include/ "imx53.dtsi"
16 / {
17         model = "Freescale i.MX53 Automotive Reference Design Board";
18         compatible = "fsl,imx53-ard", "fsl,imx53";
20         chosen {
21                 bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";
22         };
24         memory {
25                 reg = <0x70000000 0x40000000>;
26         };
28         soc {
29                 aips@50000000 { /* AIPS1 */
30                         spba@50000000 {
31                                 esdhc@50004000 { /* ESDHC1 */
32                                         cd-gpios = <&gpio1 1 0>;
33                                         wp-gpios = <&gpio1 9 0>;
34                                         status = "okay";
35                                 };
36                         };
38                         wdog@53f98000 { /* WDOG1 */
39                                 status = "okay";
40                         };
42                         iomuxc@53fa8000 {
43                                 compatible = "fsl,imx53-iomuxc-ard";
44                                 reg = <0x53fa8000 0x4000>;
45                         };
47                         uart1: uart@53fbc000 {
48                                 status = "okay";
49                         };
50                 };
52                 aips@60000000 { /* AIPS2 */
53                         sdma@63fb0000 {
54                                 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
55                         };
56                 };
57         };
59         eim-cs1@f4000000 {
60                 #address-cells = <1>;
61                 #size-cells = <1>;
62                 compatible = "fsl,eim-bus", "simple-bus";
63                 reg = <0xf4000000 0x3ff0000>;
64                 ranges;
66                 lan9220@f4000000 {
67                         compatible = "smsc,lan9220", "smsc,lan9115";
68                         reg = <0xf4000000 0x2000000>;
69                         phy-mode = "mii";
70                         interrupt-parent = <&gpio2>;
71                         interrupts = <31>;
72                         reg-io-width = <4>;
73                         smsc,irq-push-pull;
74                 };
75         };
77         gpio-keys {
78                 compatible = "gpio-keys";
80                 home {
81                         label = "Home";
82                         gpios = <&gpio5 10 0>;
83                         linux,code = <102>; /* KEY_HOME */
84                         gpio-key,wakeup;
85                 };
87                 back {
88                         label = "Back";
89                         gpios = <&gpio5 11 0>;
90                         linux,code = <158>; /* KEY_BACK */
91                         gpio-key,wakeup;
92                 };
94                 program {
95                         label = "Program";
96                         gpios = <&gpio5 12 0>;
97                         linux,code = <362>; /* KEY_PROGRAM */
98                         gpio-key,wakeup;
99                 };
101                 volume-up {
102                         label = "Volume Up";
103                         gpios = <&gpio5 13 0>;
104                         linux,code = <115>; /* KEY_VOLUMEUP */
105                 };
107                 volume-down {
108                         label = "Volume Down";
109                         gpios = <&gpio4 0 0>;
110                         linux,code = <114>; /* KEY_VOLUMEDOWN */
111                 };
112         };