spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / arm / boot / dts / tegra-ventana.dts
blobc7d3b87f29dfe0458f047cf64e1dc4f23d5758f9
1 /dts-v1/;
3 /include/ "tegra20.dtsi"
5 / {
6         model = "NVIDIA Tegra2 Ventana evaluation board";
7         compatible = "nvidia,ventana", "nvidia,tegra20";
9         memory {
10                 reg = < 0x00000000 0x40000000 >;
11         };
13         i2c@7000c000 {
14                 clock-frequency = <400000>;
15         };
17         i2c@7000c400 {
18                 clock-frequency = <400000>;
19         };
21         i2c@7000c500 {
22                 clock-frequency = <400000>;
23         };
25         i2c@7000d000 {
26                 clock-frequency = <400000>;
27         };
29         serial@70006000 {
30                 status = "disable";
31         };
33         serial@70006040 {
34                 status = "disable";
35         };
37         serial@70006200 {
38                 status = "disable";
39         };
41         serial@70006300 {
42                 clock-frequency = < 216000000 >;
43         };
45         serial@70006400 {
46                 status = "disable";
47         };
49         sdhci@c8000000 {
50                 status = "disable";
51         };
53         sdhci@c8000200 {
54                 status = "disable";
55         };
57         sdhci@c8000400 {
58                 cd-gpios = <&gpio 69 0>; /* gpio PI5 */
59                 wp-gpios = <&gpio 57 0>; /* gpio PH1 */
60                 power-gpios = <&gpio 70 0>; /* gpio PI6 */
61         };
63         sdhci@c8000600 {
64                 support-8bit;
65         };