spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / arm / include / asm / fiq.h
blobd493d0b742a1383e716ab1b3c8f3286756e27689
1 /*
2 * arch/arm/include/asm/fiq.h
4 * Support for FIQ on ARM architectures.
5 * Written by Philip Blundell <philb@gnu.org>, 1998
6 * Re-written by Russell King
8 * NOTE: The FIQ mode registers are not magically preserved across
9 * suspend/resume.
11 * Drivers which require these registers to be preserved across power
12 * management operations must implement appropriate suspend/resume handlers to
13 * save and restore them.
16 #ifndef __ASM_FIQ_H
17 #define __ASM_FIQ_H
19 #include <asm/ptrace.h>
21 struct fiq_handler {
22 struct fiq_handler *next;
23 /* Name
25 const char *name;
26 /* Called to ask driver to relinquish/
27 * reacquire FIQ
28 * return zero to accept, or -<errno>
30 int (*fiq_op)(void *, int relinquish);
31 /* data for the relinquish/reacquire functions
33 void *dev_id;
36 extern int claim_fiq(struct fiq_handler *f);
37 extern void release_fiq(struct fiq_handler *f);
38 extern void set_fiq_handler(void *start, unsigned int length);
39 extern void enable_fiq(int fiq);
40 extern void disable_fiq(int fiq);
42 /* helpers defined in fiqasm.S: */
43 extern void __set_fiq_regs(unsigned long const *regs);
44 extern void __get_fiq_regs(unsigned long *regs);
46 static inline void set_fiq_regs(struct pt_regs const *regs)
48 __set_fiq_regs(&regs->ARM_r8);
51 static inline void get_fiq_regs(struct pt_regs *regs)
53 __get_fiq_regs(&regs->ARM_r8);
56 #endif