spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / arm / include / asm / glue-cache.h
blob7e30874377e67bede33d1f4a047bfc4f1de65fc0
1 /*
2 * arch/arm/include/asm/glue-cache.h
4 * Copyright (C) 1999-2002 Russell King
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10 #ifndef ASM_GLUE_CACHE_H
11 #define ASM_GLUE_CACHE_H
13 #include <asm/glue.h>
16 * Cache Model
17 * ===========
19 #undef _CACHE
20 #undef MULTI_CACHE
22 #if defined(CONFIG_CPU_CACHE_V3)
23 # ifdef _CACHE
24 # define MULTI_CACHE 1
25 # else
26 # define _CACHE v3
27 # endif
28 #endif
30 #if defined(CONFIG_CPU_CACHE_V4)
31 # ifdef _CACHE
32 # define MULTI_CACHE 1
33 # else
34 # define _CACHE v4
35 # endif
36 #endif
38 #if defined(CONFIG_CPU_ARM920T) || defined(CONFIG_CPU_ARM922T) || \
39 defined(CONFIG_CPU_ARM925T) || defined(CONFIG_CPU_ARM1020) || \
40 defined(CONFIG_CPU_ARM1026)
41 # define MULTI_CACHE 1
42 #endif
44 #if defined(CONFIG_CPU_FA526)
45 # ifdef _CACHE
46 # define MULTI_CACHE 1
47 # else
48 # define _CACHE fa
49 # endif
50 #endif
52 #if defined(CONFIG_CPU_ARM926T)
53 # ifdef _CACHE
54 # define MULTI_CACHE 1
55 # else
56 # define _CACHE arm926
57 # endif
58 #endif
60 #if defined(CONFIG_CPU_ARM940T)
61 # ifdef _CACHE
62 # define MULTI_CACHE 1
63 # else
64 # define _CACHE arm940
65 # endif
66 #endif
68 #if defined(CONFIG_CPU_ARM946E)
69 # ifdef _CACHE
70 # define MULTI_CACHE 1
71 # else
72 # define _CACHE arm946
73 # endif
74 #endif
76 #if defined(CONFIG_CPU_CACHE_V4WB)
77 # ifdef _CACHE
78 # define MULTI_CACHE 1
79 # else
80 # define _CACHE v4wb
81 # endif
82 #endif
84 #if defined(CONFIG_CPU_XSCALE)
85 # ifdef _CACHE
86 # define MULTI_CACHE 1
87 # else
88 # define _CACHE xscale
89 # endif
90 #endif
92 #if defined(CONFIG_CPU_XSC3)
93 # ifdef _CACHE
94 # define MULTI_CACHE 1
95 # else
96 # define _CACHE xsc3
97 # endif
98 #endif
100 #if defined(CONFIG_CPU_MOHAWK)
101 # ifdef _CACHE
102 # define MULTI_CACHE 1
103 # else
104 # define _CACHE mohawk
105 # endif
106 #endif
108 #if defined(CONFIG_CPU_FEROCEON)
109 # define MULTI_CACHE 1
110 #endif
112 #if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K)
113 //# ifdef _CACHE
114 # define MULTI_CACHE 1
115 //# else
116 //# define _CACHE v6
117 //# endif
118 #endif
120 #if defined(CONFIG_CPU_V7)
121 //# ifdef _CACHE
122 # define MULTI_CACHE 1
123 //# else
124 //# define _CACHE v7
125 //# endif
126 #endif
128 #if !defined(_CACHE) && !defined(MULTI_CACHE)
129 #error Unknown cache maintenance model
130 #endif
132 #ifndef MULTI_CACHE
133 #define __cpuc_flush_icache_all __glue(_CACHE,_flush_icache_all)
134 #define __cpuc_flush_kern_all __glue(_CACHE,_flush_kern_cache_all)
135 #define __cpuc_flush_user_all __glue(_CACHE,_flush_user_cache_all)
136 #define __cpuc_flush_user_range __glue(_CACHE,_flush_user_cache_range)
137 #define __cpuc_coherent_kern_range __glue(_CACHE,_coherent_kern_range)
138 #define __cpuc_coherent_user_range __glue(_CACHE,_coherent_user_range)
139 #define __cpuc_flush_dcache_area __glue(_CACHE,_flush_kern_dcache_area)
141 #define dmac_map_area __glue(_CACHE,_dma_map_area)
142 #define dmac_unmap_area __glue(_CACHE,_dma_unmap_area)
143 #define dmac_flush_range __glue(_CACHE,_dma_flush_range)
144 #endif
146 #endif