spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / arm / include / asm / mmu.h
blob14965658a923c5e99c009292ddc99f06d013738a
1 #ifndef __ARM_MMU_H
2 #define __ARM_MMU_H
4 #ifdef CONFIG_MMU
6 typedef struct {
7 #ifdef CONFIG_CPU_HAS_ASID
8 unsigned int id;
9 raw_spinlock_t id_lock;
10 #endif
11 unsigned int kvm_seq;
12 } mm_context_t;
14 #ifdef CONFIG_CPU_HAS_ASID
15 #define ASID(mm) ((mm)->context.id & 255)
17 /* init_mm.context.id_lock should be initialized. */
18 #define INIT_MM_CONTEXT(name) \
19 .context.id_lock = __RAW_SPIN_LOCK_UNLOCKED(name.context.id_lock),
20 #else
21 #define ASID(mm) (0)
22 #endif
24 #else
27 * From nommu.h:
28 * Copyright (C) 2002, David McCullough <davidm@snapgear.com>
29 * modified for 2.6 by Hyok S. Choi <hyok.choi@samsung.com>
31 typedef struct {
32 unsigned long end_brk;
33 } mm_context_t;
35 #endif
37 #endif