spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / arm / include / asm / sparsemem.h
blob00098615c6f0c35506f9628bb08dc81c39dca7a7
1 #ifndef ASMARM_SPARSEMEM_H
2 #define ASMARM_SPARSEMEM_H
4 #include <asm/memory.h>
6 /*
7 * Two definitions are required for sparsemem:
9 * MAX_PHYSMEM_BITS: The number of physical address bits required
10 * to address the last byte of memory.
12 * SECTION_SIZE_BITS: The number of physical address bits to cover
13 * the maximum amount of memory in a section.
15 * Eg, if you have 2 banks of up to 64MB at 0x80000000, 0x84000000,
16 * then MAX_PHYSMEM_BITS is 32, SECTION_SIZE_BITS is 26.
18 * Define these in your mach/memory.h.
20 #if !defined(SECTION_SIZE_BITS) || !defined(MAX_PHYSMEM_BITS)
21 #error Sparsemem is not supported on this platform
22 #endif
24 #endif