spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / arm / kernel / irq.c
blob87c8be59a25a044475a00d7e5e711b979ac35884
1 /*
2 * linux/arch/arm/kernel/irq.c
4 * Copyright (C) 1992 Linus Torvalds
5 * Modifications for ARM processor Copyright (C) 1995-2000 Russell King.
7 * Support for Dynamic Tick Timer Copyright (C) 2004-2005 Nokia Corporation.
8 * Dynamic Tick Timer written by Tony Lindgren <tony@atomide.com> and
9 * Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>.
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
15 * This file contains the code used by various IRQ handling routines:
16 * asking for different IRQ's should be done through these routines
17 * instead of just grabbing them. Thus setups with different IRQ numbers
18 * shouldn't result in any weird surprises, and installing new handlers
19 * should be easier.
21 * IRQ's are in fact implemented a bit like signal handlers for the kernel.
22 * Naturally it's not a 1:1 relation, but there are similarities.
24 #include <linux/kernel_stat.h>
25 #include <linux/signal.h>
26 #include <linux/ioport.h>
27 #include <linux/interrupt.h>
28 #include <linux/irq.h>
29 #include <linux/random.h>
30 #include <linux/smp.h>
31 #include <linux/init.h>
32 #include <linux/seq_file.h>
33 #include <linux/errno.h>
34 #include <linux/list.h>
35 #include <linux/kallsyms.h>
36 #include <linux/proc_fs.h>
38 #include <asm/exception.h>
39 #include <asm/system.h>
40 #include <asm/mach/arch.h>
41 #include <asm/mach/irq.h>
42 #include <asm/mach/time.h>
45 * No architecture-specific irq_finish function defined in arm/arch/irqs.h.
47 #ifndef irq_finish
48 #define irq_finish(irq) do { } while (0)
49 #endif
51 unsigned long irq_err_count;
53 int arch_show_interrupts(struct seq_file *p, int prec)
55 #ifdef CONFIG_FIQ
56 show_fiq_list(p, prec);
57 #endif
58 #ifdef CONFIG_SMP
59 show_ipi_list(p, prec);
60 #endif
61 seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count);
62 return 0;
66 * handle_IRQ handles all hardware IRQ's. Decoded IRQs should
67 * not come via this function. Instead, they should provide their
68 * own 'handler'. Used by platform code implementing C-based 1st
69 * level decoding.
71 void handle_IRQ(unsigned int irq, struct pt_regs *regs)
73 struct pt_regs *old_regs = set_irq_regs(regs);
75 irq_enter();
78 * Some hardware gives randomly wrong interrupts. Rather
79 * than crashing, do something sensible.
81 if (unlikely(irq >= nr_irqs)) {
82 if (printk_ratelimit())
83 printk(KERN_WARNING "Bad IRQ%u\n", irq);
84 ack_bad_irq(irq);
85 } else {
86 generic_handle_irq(irq);
89 /* AT91 specific workaround */
90 irq_finish(irq);
92 irq_exit();
93 set_irq_regs(old_regs);
97 * asm_do_IRQ is the interface to be used from assembly code.
99 asmlinkage void __exception_irq_entry
100 asm_do_IRQ(unsigned int irq, struct pt_regs *regs)
102 handle_IRQ(irq, regs);
105 void set_irq_flags(unsigned int irq, unsigned int iflags)
107 unsigned long clr = 0, set = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN;
109 if (irq >= nr_irqs) {
110 printk(KERN_ERR "Trying to set irq flags for IRQ%d\n", irq);
111 return;
114 if (iflags & IRQF_VALID)
115 clr |= IRQ_NOREQUEST;
116 if (iflags & IRQF_PROBE)
117 clr |= IRQ_NOPROBE;
118 if (!(iflags & IRQF_NOAUTOEN))
119 clr |= IRQ_NOAUTOEN;
120 /* Order is clear bits in "clr" then set bits in "set" */
121 irq_modify_status(irq, clr, set & ~clr);
124 void __init init_IRQ(void)
126 machine_desc->init_irq();
129 #ifdef CONFIG_SPARSE_IRQ
130 int __init arch_probe_nr_irqs(void)
132 nr_irqs = machine_desc->nr_irqs ? machine_desc->nr_irqs : NR_IRQS;
133 return nr_irqs;
135 #endif
137 #ifdef CONFIG_HOTPLUG_CPU
139 static bool migrate_one_irq(struct irq_desc *desc)
141 struct irq_data *d = irq_desc_get_irq_data(desc);
142 const struct cpumask *affinity = d->affinity;
143 struct irq_chip *c;
144 bool ret = false;
147 * If this is a per-CPU interrupt, or the affinity does not
148 * include this CPU, then we have nothing to do.
150 if (irqd_is_per_cpu(d) || !cpumask_test_cpu(smp_processor_id(), affinity))
151 return false;
153 if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids) {
154 affinity = cpu_online_mask;
155 ret = true;
158 c = irq_data_get_irq_chip(d);
159 if (!c->irq_set_affinity)
160 pr_debug("IRQ%u: unable to set affinity\n", d->irq);
161 else if (c->irq_set_affinity(d, affinity, true) == IRQ_SET_MASK_OK && ret)
162 cpumask_copy(d->affinity, affinity);
164 return ret;
168 * The current CPU has been marked offline. Migrate IRQs off this CPU.
169 * If the affinity settings do not allow other CPUs, force them onto any
170 * available CPU.
172 * Note: we must iterate over all IRQs, whether they have an attached
173 * action structure or not, as we need to get chained interrupts too.
175 void migrate_irqs(void)
177 unsigned int i;
178 struct irq_desc *desc;
179 unsigned long flags;
181 local_irq_save(flags);
183 for_each_irq_desc(i, desc) {
184 bool affinity_broken = false;
186 if (!desc)
187 continue;
189 raw_spin_lock(&desc->lock);
190 affinity_broken = migrate_one_irq(desc);
191 raw_spin_unlock(&desc->lock);
193 if (affinity_broken && printk_ratelimit())
194 pr_warning("IRQ%u no longer affine to CPU%u\n", i,
195 smp_processor_id());
198 local_irq_restore(flags);
200 #endif /* CONFIG_HOTPLUG_CPU */