spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / arm / lib / io-writesw-armv3.S
blob49b800419e32ca6b6dbed9c27d0ee4e3960b639b
1 /*
2  *  linux/arch/arm/lib/io-writesw-armv3.S
3  *
4  *  Copyright (C) 1995-2000 Russell King
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10 #include <linux/linkage.h>
11 #include <asm/assembler.h>
13 .Loutsw_bad_alignment:
14                 adr     r0, .Loutsw_bad_align_msg
15                 mov     r2, lr
16                 b       panic
17 .Loutsw_bad_align_msg:
18                 .asciz  "outsw: bad buffer alignment (0x%p, lr=0x%08lX)\n"
19                 .align
21 .Loutsw_align:  tst     r1, #1
22                 bne     .Loutsw_bad_alignment
24                 add     r1, r1, #2
26                 ldr     r3, [r1, #-4]
27                 mov     r3, r3, lsr #16
28                 orr     r3, r3, r3, lsl #16
29                 str     r3, [r0]
30                 subs    r2, r2, #1
31                 moveq   pc, lr
33 ENTRY(__raw_writesw)
34                 teq     r2, #0          @ do we have to check for the zero len?
35                 moveq   pc, lr
36                 tst     r1, #3
37                 bne     .Loutsw_align
39                 stmfd   sp!, {r4, r5, r6, lr}
41                 subs    r2, r2, #8
42                 bmi     .Lno_outsw_8
44 .Loutsw_8_lp:   ldmia   r1!, {r3, r4, r5, r6}
46                 mov     ip, r3, lsl #16
47                 orr     ip, ip, ip, lsr #16
48                 str     ip, [r0]
50                 mov     ip, r3, lsr #16
51                 orr     ip, ip, ip, lsl #16
52                 str     ip, [r0]
54                 mov     ip, r4, lsl #16
55                 orr     ip, ip, ip, lsr #16
56                 str     ip, [r0]
58                 mov     ip, r4, lsr #16
59                 orr     ip, ip, ip, lsl #16
60                 str     ip, [r0]
62                 mov     ip, r5, lsl #16
63                 orr     ip, ip, ip, lsr #16
64                 str     ip, [r0]
66                 mov     ip, r5, lsr #16
67                 orr     ip, ip, ip, lsl #16
68                 str     ip, [r0]
70                 mov     ip, r6, lsl #16
71                 orr     ip, ip, ip, lsr #16
72                 str     ip, [r0]
74                 mov     ip, r6, lsr #16
75                 orr     ip, ip, ip, lsl #16
76                 str     ip, [r0]
78                 subs    r2, r2, #8
79                 bpl     .Loutsw_8_lp
81                 tst     r2, #7
82                 ldmeqfd sp!, {r4, r5, r6, pc}
84 .Lno_outsw_8:   tst     r2, #4
85                 beq     .Lno_outsw_4
87                 ldmia   r1!, {r3, r4}
89                 mov     ip, r3, lsl #16
90                 orr     ip, ip, ip, lsr #16
91                 str     ip, [r0]
93                 mov     ip, r3, lsr #16
94                 orr     ip, ip, ip, lsl #16
95                 str     ip, [r0]
97                 mov     ip, r4, lsl #16
98                 orr     ip, ip, ip, lsr #16
99                 str     ip, [r0]
101                 mov     ip, r4, lsr #16
102                 orr     ip, ip, ip, lsl #16
103                 str     ip, [r0]
105 .Lno_outsw_4:   tst     r2, #2
106                 beq     .Lno_outsw_2
108                 ldr     r3, [r1], #4
110                 mov     ip, r3, lsl #16
111                 orr     ip, ip, ip, lsr #16
112                 str     ip, [r0]
114                 mov     ip, r3, lsr #16
115                 orr     ip, ip, ip, lsl #16
116                 str     ip, [r0]
118 .Lno_outsw_2:   tst     r2, #1
120                 ldrne   r3, [r1]
122                 movne   ip, r3, lsl #16
123                 orrne   ip, ip, ip, lsr #16
124                 strne   ip, [r0]
126                 ldmfd   sp!, {r4, r5, r6, pc}