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spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / arm / mach-at91 / at91sam9260_devices.c
blob5a24f0b4554db2b7e4ea50e620b464e2e9b9363a
1 /*
2 * arch/arm/mach-at91/at91sam9260_devices.c
3 *
4 * Copyright (C) 2006 Atmel
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 */
12 #include <asm/mach/arch.h>
13 #include <asm/mach/map.h>
14
15 #include <linux/dma-mapping.h>
16 #include <linux/gpio.h>
17 #include <linux/platform_device.h>
18 #include <linux/i2c-gpio.h>
19
20 #include <mach/board.h>
21 #include <mach/cpu.h>
22 #include <mach/at91sam9260.h>
23 #include <mach/at91sam9260_matrix.h>
24 #include <mach/at91sam9_smc.h>
25
26 #include "generic.h"
27
28
29 /* --------------------------------------------------------------------
30 * USB Host
31 * -------------------------------------------------------------------- */
32
33 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
34 static u64 ohci_dmamask = DMA_BIT_MASK(32);
35 static struct at91_usbh_data usbh_data;
36
37 static struct resource usbh_resources[] = {
38 [0] = {
39 .start = AT91SAM9260_UHP_BASE,
40 .end = AT91SAM9260_UHP_BASE + SZ_1M - 1,
41 .flags = IORESOURCE_MEM,
42 },
43 [1] = {
44 .start = AT91SAM9260_ID_UHP,
45 .end = AT91SAM9260_ID_UHP,
46 .flags = IORESOURCE_IRQ,
47 },
48 };
49
50 static struct platform_device at91_usbh_device = {
51 .name = "at91_ohci",
52 .id = -1,
53 .dev = {
54 .dma_mask = &ohci_dmamask,
55 .coherent_dma_mask = DMA_BIT_MASK(32),
56 .platform_data = &usbh_data,
57 },
58 .resource = usbh_resources,
59 .num_resources = ARRAY_SIZE(usbh_resources),
60 };
61
62 void __init at91_add_device_usbh(struct at91_usbh_data *data)
63 {
64 int i;
65
66 if (!data)
67 return;
68
69 /* Enable overcurrent notification */
70 for (i = 0; i < data->ports; i++) {
71 if (data->overcurrent_pin[i])
72 at91_set_gpio_input(data->overcurrent_pin[i], 1);
73 }
74
75 usbh_data = *data;
76 platform_device_register(&at91_usbh_device);
77 }
78 #else
79 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
80 #endif
81
82
83 /* --------------------------------------------------------------------
84 * USB Device (Gadget)
85 * -------------------------------------------------------------------- */
86
87 #if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE)
88 static struct at91_udc_data udc_data;
89
90 static struct resource udc_resources[] = {
91 [0] = {
92 .start = AT91SAM9260_BASE_UDP,
93 .end = AT91SAM9260_BASE_UDP + SZ_16K - 1,
94 .flags = IORESOURCE_MEM,
95 },
96 [1] = {
97 .start = AT91SAM9260_ID_UDP,
98 .end = AT91SAM9260_ID_UDP,
99 .flags = IORESOURCE_IRQ,
100 },
101 };
102
103 static struct platform_device at91_udc_device = {
104 .name = "at91_udc",
105 .id = -1,
106 .dev = {
107 .platform_data = &udc_data,
108 },
109 .resource = udc_resources,
110 .num_resources = ARRAY_SIZE(udc_resources),
111 };
112
113 void __init at91_add_device_udc(struct at91_udc_data *data)
114 {
115 if (!data)
116 return;
117
118 if (gpio_is_valid(data->vbus_pin)) {
119 at91_set_gpio_input(data->vbus_pin, 0);
120 at91_set_deglitch(data->vbus_pin, 1);
121 }
122
123 /* Pullup pin is handled internally by USB device peripheral */
124
125 udc_data = *data;
126 platform_device_register(&at91_udc_device);
127 }
128 #else
129 void __init at91_add_device_udc(struct at91_udc_data *data) {}
130 #endif
131
132
133 /* --------------------------------------------------------------------
134 * Ethernet
135 * -------------------------------------------------------------------- */
136
137 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
138 static u64 eth_dmamask = DMA_BIT_MASK(32);
139 static struct macb_platform_data eth_data;
140
141 static struct resource eth_resources[] = {
142 [0] = {
143 .start = AT91SAM9260_BASE_EMAC,
144 .end = AT91SAM9260_BASE_EMAC + SZ_16K - 1,
145 .flags = IORESOURCE_MEM,
146 },
147 [1] = {
148 .start = AT91SAM9260_ID_EMAC,
149 .end = AT91SAM9260_ID_EMAC,
150 .flags = IORESOURCE_IRQ,
151 },
152 };
153
154 static struct platform_device at91sam9260_eth_device = {
155 .name = "macb",
156 .id = -1,
157 .dev = {
158 .dma_mask = &eth_dmamask,
159 .coherent_dma_mask = DMA_BIT_MASK(32),
160 .platform_data = &eth_data,
161 },
162 .resource = eth_resources,
163 .num_resources = ARRAY_SIZE(eth_resources),
164 };
165
166 void __init at91_add_device_eth(struct macb_platform_data *data)
167 {
168 if (!data)
169 return;
170
171 if (gpio_is_valid(data->phy_irq_pin)) {
172 at91_set_gpio_input(data->phy_irq_pin, 0);
173 at91_set_deglitch(data->phy_irq_pin, 1);
174 }
175
176 /* Pins used for MII and RMII */
177 at91_set_A_periph(AT91_PIN_PA19, 0); /* ETXCK_EREFCK */
178 at91_set_A_periph(AT91_PIN_PA17, 0); /* ERXDV */
179 at91_set_A_periph(AT91_PIN_PA14, 0); /* ERX0 */
180 at91_set_A_periph(AT91_PIN_PA15, 0); /* ERX1 */
181 at91_set_A_periph(AT91_PIN_PA18, 0); /* ERXER */
182 at91_set_A_periph(AT91_PIN_PA16, 0); /* ETXEN */
183 at91_set_A_periph(AT91_PIN_PA12, 0); /* ETX0 */
184 at91_set_A_periph(AT91_PIN_PA13, 0); /* ETX1 */
185 at91_set_A_periph(AT91_PIN_PA21, 0); /* EMDIO */
186 at91_set_A_periph(AT91_PIN_PA20, 0); /* EMDC */
187
188 if (!data->is_rmii) {
189 at91_set_B_periph(AT91_PIN_PA28, 0); /* ECRS */
190 at91_set_B_periph(AT91_PIN_PA29, 0); /* ECOL */
191 at91_set_B_periph(AT91_PIN_PA25, 0); /* ERX2 */
192 at91_set_B_periph(AT91_PIN_PA26, 0); /* ERX3 */
193 at91_set_B_periph(AT91_PIN_PA27, 0); /* ERXCK */
194 at91_set_B_periph(AT91_PIN_PA23, 0); /* ETX2 */
195 at91_set_B_periph(AT91_PIN_PA24, 0); /* ETX3 */
196 at91_set_B_periph(AT91_PIN_PA22, 0); /* ETXER */
197 }
198
199 eth_data = *data;
200 platform_device_register(&at91sam9260_eth_device);
201 }
202 #else
203 void __init at91_add_device_eth(struct macb_platform_data *data) {}
204 #endif
205
206
207 /* --------------------------------------------------------------------
208 * MMC / SD
209 * -------------------------------------------------------------------- */
210
211 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
212 static u64 mmc_dmamask = DMA_BIT_MASK(32);
213 static struct at91_mmc_data mmc_data;
214
215 static struct resource mmc_resources[] = {
216 [0] = {
217 .start = AT91SAM9260_BASE_MCI,
218 .end = AT91SAM9260_BASE_MCI + SZ_16K - 1,
219 .flags = IORESOURCE_MEM,
220 },
221 [1] = {
222 .start = AT91SAM9260_ID_MCI,
223 .end = AT91SAM9260_ID_MCI,
224 .flags = IORESOURCE_IRQ,
225 },
226 };
227
228 static struct platform_device at91sam9260_mmc_device = {
229 .name = "at91_mci",
230 .id = -1,
231 .dev = {
232 .dma_mask = &mmc_dmamask,
233 .coherent_dma_mask = DMA_BIT_MASK(32),
234 .platform_data = &mmc_data,
235 },
236 .resource = mmc_resources,
237 .num_resources = ARRAY_SIZE(mmc_resources),
238 };
239
240 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
241 {
242 if (!data)
243 return;
244
245 /* input/irq */
246 if (gpio_is_valid(data->det_pin)) {
247 at91_set_gpio_input(data->det_pin, 1);
248 at91_set_deglitch(data->det_pin, 1);
249 }
250 if (gpio_is_valid(data->wp_pin))
251 at91_set_gpio_input(data->wp_pin, 1);
252 if (gpio_is_valid(data->vcc_pin))
253 at91_set_gpio_output(data->vcc_pin, 0);
254
255 /* CLK */
256 at91_set_A_periph(AT91_PIN_PA8, 0);
257
258 if (data->slot_b) {
259 /* CMD */
260 at91_set_B_periph(AT91_PIN_PA1, 1);
261
262 /* DAT0, maybe DAT1..DAT3 */
263 at91_set_B_periph(AT91_PIN_PA0, 1);
264 if (data->wire4) {
265 at91_set_B_periph(AT91_PIN_PA5, 1);
266 at91_set_B_periph(AT91_PIN_PA4, 1);
267 at91_set_B_periph(AT91_PIN_PA3, 1);
268 }
269 } else {
270 /* CMD */
271 at91_set_A_periph(AT91_PIN_PA7, 1);
272
273 /* DAT0, maybe DAT1..DAT3 */
274 at91_set_A_periph(AT91_PIN_PA6, 1);
275 if (data->wire4) {
276 at91_set_A_periph(AT91_PIN_PA9, 1);
277 at91_set_A_periph(AT91_PIN_PA10, 1);
278 at91_set_A_periph(AT91_PIN_PA11, 1);
279 }
280 }
281
282 mmc_data = *data;
283 platform_device_register(&at91sam9260_mmc_device);
284 }
285 #else
286 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
287 #endif
288
289 /* --------------------------------------------------------------------
290 * MMC / SD Slot for Atmel MCI Driver
291 * -------------------------------------------------------------------- */
292
293 #if defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_ATMELMCI_MODULE)
294 static u64 mmc_dmamask = DMA_BIT_MASK(32);
295 static struct mci_platform_data mmc_data;
296
297 static struct resource mmc_resources[] = {
298 [0] = {
299 .start = AT91SAM9260_BASE_MCI,
300 .end = AT91SAM9260_BASE_MCI + SZ_16K - 1,
301 .flags = IORESOURCE_MEM,
302 },
303 [1] = {
304 .start = AT91SAM9260_ID_MCI,
305 .end = AT91SAM9260_ID_MCI,
306 .flags = IORESOURCE_IRQ,
307 },
308 };
309
310 static struct platform_device at91sam9260_mmc_device = {
311 .name = "atmel_mci",
312 .id = -1,
313 .dev = {
314 .dma_mask = &mmc_dmamask,
315 .coherent_dma_mask = DMA_BIT_MASK(32),
316 .platform_data = &mmc_data,
317 },
318 .resource = mmc_resources,
319 .num_resources = ARRAY_SIZE(mmc_resources),
320 };
321
322 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
323 {
324 unsigned int i;
325 unsigned int slot_count = 0;
326
327 if (!data)
328 return;
329
330 for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
331 if (data->slot[i].bus_width) {
332 /* input/irq */
333 if (gpio_is_valid(data->slot[i].detect_pin)) {
334 at91_set_gpio_input(data->slot[i].detect_pin, 1);
335 at91_set_deglitch(data->slot[i].detect_pin, 1);
336 }
337 if (gpio_is_valid(data->slot[i].wp_pin))
338 at91_set_gpio_input(data->slot[i].wp_pin, 1);
339
340 switch (i) {
341 case 0:
342 /* CMD */
343 at91_set_A_periph(AT91_PIN_PA7, 1);
344 /* DAT0, maybe DAT1..DAT3 */
345 at91_set_A_periph(AT91_PIN_PA6, 1);
346 if (data->slot[i].bus_width == 4) {
347 at91_set_A_periph(AT91_PIN_PA9, 1);
348 at91_set_A_periph(AT91_PIN_PA10, 1);
349 at91_set_A_periph(AT91_PIN_PA11, 1);
350 }
351 slot_count++;
352 break;
353 case 1:
354 /* CMD */
355 at91_set_B_periph(AT91_PIN_PA1, 1);
356 /* DAT0, maybe DAT1..DAT3 */
357 at91_set_B_periph(AT91_PIN_PA0, 1);
358 if (data->slot[i].bus_width == 4) {
359 at91_set_B_periph(AT91_PIN_PA5, 1);
360 at91_set_B_periph(AT91_PIN_PA4, 1);
361 at91_set_B_periph(AT91_PIN_PA3, 1);
362 }
363 slot_count++;
364 break;
365 default:
366 printk(KERN_ERR
367 "AT91: SD/MMC slot %d not available\n", i);
368 break;
369 }
370 }
371 }
372
373 if (slot_count) {
374 /* CLK */
375 at91_set_A_periph(AT91_PIN_PA8, 0);
376
377 mmc_data = *data;
378 platform_device_register(&at91sam9260_mmc_device);
379 }
380 }
381 #else
382 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) {}
383 #endif
384
385
386 /* --------------------------------------------------------------------
387 * NAND / SmartMedia
388 * -------------------------------------------------------------------- */
389
390 #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
391 static struct atmel_nand_data nand_data;
392
393 #define NAND_BASE AT91_CHIPSELECT_3
394
395 static struct resource nand_resources[] = {
396 [0] = {
397 .start = NAND_BASE,
398 .end = NAND_BASE + SZ_256M - 1,
399 .flags = IORESOURCE_MEM,
400 },
401 [1] = {
402 .start = AT91SAM9260_BASE_ECC,
403 .end = AT91SAM9260_BASE_ECC + SZ_512 - 1,
404 .flags = IORESOURCE_MEM,
405 }
406 };
407
408 static struct platform_device at91sam9260_nand_device = {
409 .name = "atmel_nand",
410 .id = -1,
411 .dev = {
412 .platform_data = &nand_data,
413 },
414 .resource = nand_resources,
415 .num_resources = ARRAY_SIZE(nand_resources),
416 };
417
418 void __init at91_add_device_nand(struct atmel_nand_data *data)
419 {
420 unsigned long csa;
421
422 if (!data)
423 return;
424
425 csa = at91_sys_read(AT91_MATRIX_EBICSA);
426 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
427
428 /* enable pin */
429 if (gpio_is_valid(data->enable_pin))
430 at91_set_gpio_output(data->enable_pin, 1);
431
432 /* ready/busy pin */
433 if (gpio_is_valid(data->rdy_pin))
434 at91_set_gpio_input(data->rdy_pin, 1);
435
436 /* card detect pin */
437 if (gpio_is_valid(data->det_pin))
438 at91_set_gpio_input(data->det_pin, 1);
439
440 nand_data = *data;
441 platform_device_register(&at91sam9260_nand_device);
442 }
443 #else
444 void __init at91_add_device_nand(struct atmel_nand_data *data) {}
445 #endif
446
447
448 /* --------------------------------------------------------------------
449 * TWI (i2c)
450 * -------------------------------------------------------------------- */
451
452 /*
453 * Prefer the GPIO code since the TWI controller isn't robust
454 * (gets overruns and underruns under load) and can only issue
455 * repeated STARTs in one scenario (the driver doesn't yet handle them).
456 */
457
458 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
459
460 static struct i2c_gpio_platform_data pdata = {
461 .sda_pin = AT91_PIN_PA23,
462 .sda_is_open_drain = 1,
463 .scl_pin = AT91_PIN_PA24,
464 .scl_is_open_drain = 1,
465 .udelay = 2, /* ~100 kHz */
466 };
467
468 static struct platform_device at91sam9260_twi_device = {
469 .name = "i2c-gpio",
470 .id = -1,
471 .dev.platform_data = &pdata,
472 };
473
474 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
475 {
476 at91_set_GPIO_periph(AT91_PIN_PA23, 1); /* TWD (SDA) */
477 at91_set_multi_drive(AT91_PIN_PA23, 1);
478
479 at91_set_GPIO_periph(AT91_PIN_PA24, 1); /* TWCK (SCL) */
480 at91_set_multi_drive(AT91_PIN_PA24, 1);
481
482 i2c_register_board_info(0, devices, nr_devices);
483 platform_device_register(&at91sam9260_twi_device);
484 }
485
486 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
487
488 static struct resource twi_resources[] = {
489 [0] = {
490 .start = AT91SAM9260_BASE_TWI,
491 .end = AT91SAM9260_BASE_TWI + SZ_16K - 1,
492 .flags = IORESOURCE_MEM,
493 },
494 [1] = {
495 .start = AT91SAM9260_ID_TWI,
496 .end = AT91SAM9260_ID_TWI,
497 .flags = IORESOURCE_IRQ,
498 },
499 };
500
501 static struct platform_device at91sam9260_twi_device = {
502 .name = "at91_i2c",
503 .id = -1,
504 .resource = twi_resources,
505 .num_resources = ARRAY_SIZE(twi_resources),
506 };
507
508 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
509 {
510 /* pins used for TWI interface */
511 at91_set_A_periph(AT91_PIN_PA23, 0); /* TWD */
512 at91_set_multi_drive(AT91_PIN_PA23, 1);
513
514 at91_set_A_periph(AT91_PIN_PA24, 0); /* TWCK */
515 at91_set_multi_drive(AT91_PIN_PA24, 1);
516
517 i2c_register_board_info(0, devices, nr_devices);
518 platform_device_register(&at91sam9260_twi_device);
519 }
520 #else
521 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
522 #endif
523
524
525 /* --------------------------------------------------------------------
526 * SPI
527 * -------------------------------------------------------------------- */
528
529 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
530 static u64 spi_dmamask = DMA_BIT_MASK(32);
531
532 static struct resource spi0_resources[] = {
533 [0] = {
534 .start = AT91SAM9260_BASE_SPI0,
535 .end = AT91SAM9260_BASE_SPI0 + SZ_16K - 1,
536 .flags = IORESOURCE_MEM,
537 },
538 [1] = {
539 .start = AT91SAM9260_ID_SPI0,
540 .end = AT91SAM9260_ID_SPI0,
541 .flags = IORESOURCE_IRQ,
542 },
543 };
544
545 static struct platform_device at91sam9260_spi0_device = {
546 .name = "atmel_spi",
547 .id = 0,
548 .dev = {
549 .dma_mask = &spi_dmamask,
550 .coherent_dma_mask = DMA_BIT_MASK(32),
551 },
552 .resource = spi0_resources,
553 .num_resources = ARRAY_SIZE(spi0_resources),
554 };
555
556 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PC11, AT91_PIN_PC16, AT91_PIN_PC17 };
557
558 static struct resource spi1_resources[] = {
559 [0] = {
560 .start = AT91SAM9260_BASE_SPI1,
561 .end = AT91SAM9260_BASE_SPI1 + SZ_16K - 1,
562 .flags = IORESOURCE_MEM,
563 },
564 [1] = {
565 .start = AT91SAM9260_ID_SPI1,
566 .end = AT91SAM9260_ID_SPI1,
567 .flags = IORESOURCE_IRQ,
568 },
569 };
570
571 static struct platform_device at91sam9260_spi1_device = {
572 .name = "atmel_spi",
573 .id = 1,
574 .dev = {
575 .dma_mask = &spi_dmamask,
576 .coherent_dma_mask = DMA_BIT_MASK(32),
577 },
578 .resource = spi1_resources,
579 .num_resources = ARRAY_SIZE(spi1_resources),
580 };
581
582 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB3, AT91_PIN_PC5, AT91_PIN_PC4, AT91_PIN_PC3 };
583
584 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
585 {
586 int i;
587 unsigned long cs_pin;
588 short enable_spi0 = 0;
589 short enable_spi1 = 0;
590
591 /* Choose SPI chip-selects */
592 for (i = 0; i < nr_devices; i++) {
593 if (devices[i].controller_data)
594 cs_pin = (unsigned long) devices[i].controller_data;
595 else if (devices[i].bus_num == 0)
596 cs_pin = spi0_standard_cs[devices[i].chip_select];
597 else
598 cs_pin = spi1_standard_cs[devices[i].chip_select];
599
600 if (devices[i].bus_num == 0)
601 enable_spi0 = 1;
602 else
603 enable_spi1 = 1;
604
605 /* enable chip-select pin */
606 at91_set_gpio_output(cs_pin, 1);
607
608 /* pass chip-select pin to driver */
609 devices[i].controller_data = (void *) cs_pin;
610 }
611
612 spi_register_board_info(devices, nr_devices);
613
614 /* Configure SPI bus(es) */
615 if (enable_spi0) {
616 at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
617 at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
618 at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI1_SPCK */
619
620 platform_device_register(&at91sam9260_spi0_device);
621 }
622 if (enable_spi1) {
623 at91_set_A_periph(AT91_PIN_PB0, 0); /* SPI1_MISO */
624 at91_set_A_periph(AT91_PIN_PB1, 0); /* SPI1_MOSI */
625 at91_set_A_periph(AT91_PIN_PB2, 0); /* SPI1_SPCK */
626
627 platform_device_register(&at91sam9260_spi1_device);
628 }
629 }
630 #else
631 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
632 #endif
633
634
635 /* --------------------------------------------------------------------
636 * Timer/Counter blocks
637 * -------------------------------------------------------------------- */
638
639 #ifdef CONFIG_ATMEL_TCLIB
640
641 static struct resource tcb0_resources[] = {
642 [0] = {
643 .start = AT91SAM9260_BASE_TCB0,
644 .end = AT91SAM9260_BASE_TCB0 + SZ_16K - 1,
645 .flags = IORESOURCE_MEM,
646 },
647 [1] = {
648 .start = AT91SAM9260_ID_TC0,
649 .end = AT91SAM9260_ID_TC0,
650 .flags = IORESOURCE_IRQ,
651 },
652 [2] = {
653 .start = AT91SAM9260_ID_TC1,
654 .end = AT91SAM9260_ID_TC1,
655 .flags = IORESOURCE_IRQ,
656 },
657 [3] = {
658 .start = AT91SAM9260_ID_TC2,
659 .end = AT91SAM9260_ID_TC2,
660 .flags = IORESOURCE_IRQ,
661 },
662 };
663
664 static struct platform_device at91sam9260_tcb0_device = {
665 .name = "atmel_tcb",
666 .id = 0,
667 .resource = tcb0_resources,
668 .num_resources = ARRAY_SIZE(tcb0_resources),
669 };
670
671 static struct resource tcb1_resources[] = {
672 [0] = {
673 .start = AT91SAM9260_BASE_TCB1,
674 .end = AT91SAM9260_BASE_TCB1 + SZ_16K - 1,
675 .flags = IORESOURCE_MEM,
676 },
677 [1] = {
678 .start = AT91SAM9260_ID_TC3,
679 .end = AT91SAM9260_ID_TC3,
680 .flags = IORESOURCE_IRQ,
681 },
682 [2] = {
683 .start = AT91SAM9260_ID_TC4,
684 .end = AT91SAM9260_ID_TC4,
685 .flags = IORESOURCE_IRQ,
686 },
687 [3] = {
688 .start = AT91SAM9260_ID_TC5,
689 .end = AT91SAM9260_ID_TC5,
690 .flags = IORESOURCE_IRQ,
691 },
692 };
693
694 static struct platform_device at91sam9260_tcb1_device = {
695 .name = "atmel_tcb",
696 .id = 1,
697 .resource = tcb1_resources,
698 .num_resources = ARRAY_SIZE(tcb1_resources),
699 };
700
701 static void __init at91_add_device_tc(void)
702 {
703 platform_device_register(&at91sam9260_tcb0_device);
704 platform_device_register(&at91sam9260_tcb1_device);
705 }
706 #else
707 static void __init at91_add_device_tc(void) { }
708 #endif
709
710
711 /* --------------------------------------------------------------------
712 * RTT
713 * -------------------------------------------------------------------- */
714
715 static struct resource rtt_resources[] = {
716 {
717 .start = AT91SAM9260_BASE_RTT,
718 .end = AT91SAM9260_BASE_RTT + SZ_16 - 1,
719 .flags = IORESOURCE_MEM,
720 }
721 };
722
723 static struct platform_device at91sam9260_rtt_device = {
724 .name = "at91_rtt",
725 .id = 0,
726 .resource = rtt_resources,
727 .num_resources = ARRAY_SIZE(rtt_resources),
728 };
729
730 static void __init at91_add_device_rtt(void)
731 {
732 platform_device_register(&at91sam9260_rtt_device);
733 }
734
735
736 /* --------------------------------------------------------------------
737 * Watchdog
738 * -------------------------------------------------------------------- */
739
740 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
741 static struct resource wdt_resources[] = {
742 {
743 .start = AT91SAM9260_BASE_WDT,
744 .end = AT91SAM9260_BASE_WDT + SZ_16 - 1,
745 .flags = IORESOURCE_MEM,
746 }
747 };
748
749 static struct platform_device at91sam9260_wdt_device = {
750 .name = "at91_wdt",
751 .id = -1,
752 .resource = wdt_resources,
753 .num_resources = ARRAY_SIZE(wdt_resources),
754 };
755
756 static void __init at91_add_device_watchdog(void)
757 {
758 platform_device_register(&at91sam9260_wdt_device);
759 }
760 #else
761 static void __init at91_add_device_watchdog(void) {}
762 #endif
763
764
765 /* --------------------------------------------------------------------
766 * SSC -- Synchronous Serial Controller
767 * -------------------------------------------------------------------- */
768
769 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
770 static u64 ssc_dmamask = DMA_BIT_MASK(32);
771
772 static struct resource ssc_resources[] = {
773 [0] = {
774 .start = AT91SAM9260_BASE_SSC,
775 .end = AT91SAM9260_BASE_SSC + SZ_16K - 1,
776 .flags = IORESOURCE_MEM,
777 },
778 [1] = {
779 .start = AT91SAM9260_ID_SSC,
780 .end = AT91SAM9260_ID_SSC,
781 .flags = IORESOURCE_IRQ,
782 },
783 };
784
785 static struct platform_device at91sam9260_ssc_device = {
786 .name = "ssc",
787 .id = 0,
788 .dev = {
789 .dma_mask = &ssc_dmamask,
790 .coherent_dma_mask = DMA_BIT_MASK(32),
791 },
792 .resource = ssc_resources,
793 .num_resources = ARRAY_SIZE(ssc_resources),
794 };
795
796 static inline void configure_ssc_pins(unsigned pins)
797 {
798 if (pins & ATMEL_SSC_TF)
799 at91_set_A_periph(AT91_PIN_PB17, 1);
800 if (pins & ATMEL_SSC_TK)
801 at91_set_A_periph(AT91_PIN_PB16, 1);
802 if (pins & ATMEL_SSC_TD)
803 at91_set_A_periph(AT91_PIN_PB18, 1);
804 if (pins & ATMEL_SSC_RD)
805 at91_set_A_periph(AT91_PIN_PB19, 1);
806 if (pins & ATMEL_SSC_RK)
807 at91_set_A_periph(AT91_PIN_PB20, 1);
808 if (pins & ATMEL_SSC_RF)
809 at91_set_A_periph(AT91_PIN_PB21, 1);
810 }
811
812 /*
813 * SSC controllers are accessed through library code, instead of any
814 * kind of all-singing/all-dancing driver. For example one could be
815 * used by a particular I2S audio codec's driver, while another one
816 * on the same system might be used by a custom data capture driver.
817 */
818 void __init at91_add_device_ssc(unsigned id, unsigned pins)
819 {
820 struct platform_device *pdev;
821
822 /*
823 * NOTE: caller is responsible for passing information matching
824 * "pins" to whatever will be using each particular controller.
825 */
826 switch (id) {
827 case AT91SAM9260_ID_SSC:
828 pdev = &at91sam9260_ssc_device;
829 configure_ssc_pins(pins);
830 break;
831 default:
832 return;
833 }
834
835 platform_device_register(pdev);
836 }
837
838 #else
839 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
840 #endif
841
842
843 /* --------------------------------------------------------------------
844 * UART
845 * -------------------------------------------------------------------- */
846 #if defined(CONFIG_SERIAL_ATMEL)
847 static struct resource dbgu_resources[] = {
848 [0] = {
849 .start = AT91SAM9260_BASE_DBGU,
850 .end = AT91SAM9260_BASE_DBGU + SZ_512 - 1,
851 .flags = IORESOURCE_MEM,
852 },
853 [1] = {
854 .start = AT91_ID_SYS,
855 .end = AT91_ID_SYS,
856 .flags = IORESOURCE_IRQ,
857 },
858 };
859
860 static struct atmel_uart_data dbgu_data = {
861 .use_dma_tx = 0,
862 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
863 };
864
865 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
866
867 static struct platform_device at91sam9260_dbgu_device = {
868 .name = "atmel_usart",
869 .id = 0,
870 .dev = {
871 .dma_mask = &dbgu_dmamask,
872 .coherent_dma_mask = DMA_BIT_MASK(32),
873 .platform_data = &dbgu_data,
874 },
875 .resource = dbgu_resources,
876 .num_resources = ARRAY_SIZE(dbgu_resources),
877 };
878
879 static inline void configure_dbgu_pins(void)
880 {
881 at91_set_A_periph(AT91_PIN_PB14, 0); /* DRXD */
882 at91_set_A_periph(AT91_PIN_PB15, 1); /* DTXD */
883 }
884
885 static struct resource uart0_resources[] = {
886 [0] = {
887 .start = AT91SAM9260_BASE_US0,
888 .end = AT91SAM9260_BASE_US0 + SZ_16K - 1,
889 .flags = IORESOURCE_MEM,
890 },
891 [1] = {
892 .start = AT91SAM9260_ID_US0,
893 .end = AT91SAM9260_ID_US0,
894 .flags = IORESOURCE_IRQ,
895 },
896 };
897
898 static struct atmel_uart_data uart0_data = {
899 .use_dma_tx = 1,
900 .use_dma_rx = 1,
901 };
902
903 static u64 uart0_dmamask = DMA_BIT_MASK(32);
904
905 static struct platform_device at91sam9260_uart0_device = {
906 .name = "atmel_usart",
907 .id = 1,
908 .dev = {
909 .dma_mask = &uart0_dmamask,
910 .coherent_dma_mask = DMA_BIT_MASK(32),
911 .platform_data = &uart0_data,
912 },
913 .resource = uart0_resources,
914 .num_resources = ARRAY_SIZE(uart0_resources),
915 };
916
917 static inline void configure_usart0_pins(unsigned pins)
918 {
919 at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD0 */
920 at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD0 */
921
922 if (pins & ATMEL_UART_RTS)
923 at91_set_A_periph(AT91_PIN_PB26, 0); /* RTS0 */
924 if (pins & ATMEL_UART_CTS)
925 at91_set_A_periph(AT91_PIN_PB27, 0); /* CTS0 */
926 if (pins & ATMEL_UART_DTR)
927 at91_set_A_periph(AT91_PIN_PB24, 0); /* DTR0 */
928 if (pins & ATMEL_UART_DSR)
929 at91_set_A_periph(AT91_PIN_PB22, 0); /* DSR0 */
930 if (pins & ATMEL_UART_DCD)
931 at91_set_A_periph(AT91_PIN_PB23, 0); /* DCD0 */
932 if (pins & ATMEL_UART_RI)
933 at91_set_A_periph(AT91_PIN_PB25, 0); /* RI0 */
934 }
935
936 static struct resource uart1_resources[] = {
937 [0] = {
938 .start = AT91SAM9260_BASE_US1,
939 .end = AT91SAM9260_BASE_US1 + SZ_16K - 1,
940 .flags = IORESOURCE_MEM,
941 },
942 [1] = {
943 .start = AT91SAM9260_ID_US1,
944 .end = AT91SAM9260_ID_US1,
945 .flags = IORESOURCE_IRQ,
946 },
947 };
948
949 static struct atmel_uart_data uart1_data = {
950 .use_dma_tx = 1,
951 .use_dma_rx = 1,
952 };
953
954 static u64 uart1_dmamask = DMA_BIT_MASK(32);
955
956 static struct platform_device at91sam9260_uart1_device = {
957 .name = "atmel_usart",
958 .id = 2,
959 .dev = {
960 .dma_mask = &uart1_dmamask,
961 .coherent_dma_mask = DMA_BIT_MASK(32),
962 .platform_data = &uart1_data,
963 },
964 .resource = uart1_resources,
965 .num_resources = ARRAY_SIZE(uart1_resources),
966 };
967
968 static inline void configure_usart1_pins(unsigned pins)
969 {
970 at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD1 */
971 at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD1 */
972
973 if (pins & ATMEL_UART_RTS)
974 at91_set_A_periph(AT91_PIN_PB28, 0); /* RTS1 */
975 if (pins & ATMEL_UART_CTS)
976 at91_set_A_periph(AT91_PIN_PB29, 0); /* CTS1 */
977 }
978
979 static struct resource uart2_resources[] = {
980 [0] = {
981 .start = AT91SAM9260_BASE_US2,
982 .end = AT91SAM9260_BASE_US2 + SZ_16K - 1,
983 .flags = IORESOURCE_MEM,
984 },
985 [1] = {
986 .start = AT91SAM9260_ID_US2,
987 .end = AT91SAM9260_ID_US2,
988 .flags = IORESOURCE_IRQ,
989 },
990 };
991
992 static struct atmel_uart_data uart2_data = {
993 .use_dma_tx = 1,
994 .use_dma_rx = 1,
995 };
996
997 static u64 uart2_dmamask = DMA_BIT_MASK(32);
998
999 static struct platform_device at91sam9260_uart2_device = {
1000 .name = "atmel_usart",
1001 .id = 3,
1002 .dev = {
1003 .dma_mask = &uart2_dmamask,
1004 .coherent_dma_mask = DMA_BIT_MASK(32),
1005 .platform_data = &uart2_data,
1006 },
1007 .resource = uart2_resources,
1008 .num_resources = ARRAY_SIZE(uart2_resources),
1009 };
1010
1011 static inline void configure_usart2_pins(unsigned pins)
1012 {
1013 at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD2 */
1014 at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD2 */
1015
1016 if (pins & ATMEL_UART_RTS)
1017 at91_set_A_periph(AT91_PIN_PA4, 0); /* RTS2 */
1018 if (pins & ATMEL_UART_CTS)
1019 at91_set_A_periph(AT91_PIN_PA5, 0); /* CTS2 */
1020 }
1021
1022 static struct resource uart3_resources[] = {
1023 [0] = {
1024 .start = AT91SAM9260_BASE_US3,
1025 .end = AT91SAM9260_BASE_US3 + SZ_16K - 1,
1026 .flags = IORESOURCE_MEM,
1027 },
1028 [1] = {
1029 .start = AT91SAM9260_ID_US3,
1030 .end = AT91SAM9260_ID_US3,
1031 .flags = IORESOURCE_IRQ,
1032 },
1033 };
1034
1035 static struct atmel_uart_data uart3_data = {
1036 .use_dma_tx = 1,
1037 .use_dma_rx = 1,
1038 };
1039
1040 static u64 uart3_dmamask = DMA_BIT_MASK(32);
1041
1042 static struct platform_device at91sam9260_uart3_device = {
1043 .name = "atmel_usart",
1044 .id = 4,
1045 .dev = {
1046 .dma_mask = &uart3_dmamask,
1047 .coherent_dma_mask = DMA_BIT_MASK(32),
1048 .platform_data = &uart3_data,
1049 },
1050 .resource = uart3_resources,
1051 .num_resources = ARRAY_SIZE(uart3_resources),
1052 };
1053
1054 static inline void configure_usart3_pins(unsigned pins)
1055 {
1056 at91_set_A_periph(AT91_PIN_PB10, 1); /* TXD3 */
1057 at91_set_A_periph(AT91_PIN_PB11, 0); /* RXD3 */
1058
1059 if (pins & ATMEL_UART_RTS)
1060 at91_set_B_periph(AT91_PIN_PC8, 0); /* RTS3 */
1061 if (pins & ATMEL_UART_CTS)
1062 at91_set_B_periph(AT91_PIN_PC10, 0); /* CTS3 */
1063 }
1064
1065 static struct resource uart4_resources[] = {
1066 [0] = {
1067 .start = AT91SAM9260_BASE_US4,
1068 .end = AT91SAM9260_BASE_US4 + SZ_16K - 1,
1069 .flags = IORESOURCE_MEM,
1070 },
1071 [1] = {
1072 .start = AT91SAM9260_ID_US4,
1073 .end = AT91SAM9260_ID_US4,
1074 .flags = IORESOURCE_IRQ,
1075 },
1076 };
1077
1078 static struct atmel_uart_data uart4_data = {
1079 .use_dma_tx = 1,
1080 .use_dma_rx = 1,
1081 };
1082
1083 static u64 uart4_dmamask = DMA_BIT_MASK(32);
1084
1085 static struct platform_device at91sam9260_uart4_device = {
1086 .name = "atmel_usart",
1087 .id = 5,
1088 .dev = {
1089 .dma_mask = &uart4_dmamask,
1090 .coherent_dma_mask = DMA_BIT_MASK(32),
1091 .platform_data = &uart4_data,
1092 },
1093 .resource = uart4_resources,
1094 .num_resources = ARRAY_SIZE(uart4_resources),
1095 };
1096
1097 static inline void configure_usart4_pins(void)
1098 {
1099 at91_set_B_periph(AT91_PIN_PA31, 1); /* TXD4 */
1100 at91_set_B_periph(AT91_PIN_PA30, 0); /* RXD4 */
1101 }
1102
1103 static struct resource uart5_resources[] = {
1104 [0] = {
1105 .start = AT91SAM9260_BASE_US5,
1106 .end = AT91SAM9260_BASE_US5 + SZ_16K - 1,
1107 .flags = IORESOURCE_MEM,
1108 },
1109 [1] = {
1110 .start = AT91SAM9260_ID_US5,
1111 .end = AT91SAM9260_ID_US5,
1112 .flags = IORESOURCE_IRQ,
1113 },
1114 };
1115
1116 static struct atmel_uart_data uart5_data = {
1117 .use_dma_tx = 1,
1118 .use_dma_rx = 1,
1119 };
1120
1121 static u64 uart5_dmamask = DMA_BIT_MASK(32);
1122
1123 static struct platform_device at91sam9260_uart5_device = {
1124 .name = "atmel_usart",
1125 .id = 6,
1126 .dev = {
1127 .dma_mask = &uart5_dmamask,
1128 .coherent_dma_mask = DMA_BIT_MASK(32),
1129 .platform_data = &uart5_data,
1130 },
1131 .resource = uart5_resources,
1132 .num_resources = ARRAY_SIZE(uart5_resources),
1133 };
1134
1135 static inline void configure_usart5_pins(void)
1136 {
1137 at91_set_A_periph(AT91_PIN_PB12, 1); /* TXD5 */
1138 at91_set_A_periph(AT91_PIN_PB13, 0); /* RXD5 */
1139 }
1140
1141 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
1142 struct platform_device *atmel_default_console_device; /* the serial console device */
1143
1144 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1145 {
1146 struct platform_device *pdev;
1147 struct atmel_uart_data *pdata;
1148
1149 switch (id) {
1150 case 0: /* DBGU */
1151 pdev = &at91sam9260_dbgu_device;
1152 configure_dbgu_pins();
1153 break;
1154 case AT91SAM9260_ID_US0:
1155 pdev = &at91sam9260_uart0_device;
1156 configure_usart0_pins(pins);
1157 break;
1158 case AT91SAM9260_ID_US1:
1159 pdev = &at91sam9260_uart1_device;
1160 configure_usart1_pins(pins);
1161 break;
1162 case AT91SAM9260_ID_US2:
1163 pdev = &at91sam9260_uart2_device;
1164 configure_usart2_pins(pins);
1165 break;
1166 case AT91SAM9260_ID_US3:
1167 pdev = &at91sam9260_uart3_device;
1168 configure_usart3_pins(pins);
1169 break;
1170 case AT91SAM9260_ID_US4:
1171 pdev = &at91sam9260_uart4_device;
1172 configure_usart4_pins();
1173 break;
1174 case AT91SAM9260_ID_US5:
1175 pdev = &at91sam9260_uart5_device;
1176 configure_usart5_pins();
1177 break;
1178 default:
1179 return;
1180 }
1181 pdata = pdev->dev.platform_data;
1182 pdata->num = portnr; /* update to mapped ID */
1183
1184 if (portnr < ATMEL_MAX_UART)
1185 at91_uarts[portnr] = pdev;
1186 }
1187
1188 void __init at91_set_serial_console(unsigned portnr)
1189 {
1190 if (portnr < ATMEL_MAX_UART) {
1191 atmel_default_console_device = at91_uarts[portnr];
1192 at91sam9260_set_console_clock(at91_uarts[portnr]->id);
1193 }
1194 }
1195
1196 void __init at91_add_device_serial(void)
1197 {
1198 int i;
1199
1200 for (i = 0; i < ATMEL_MAX_UART; i++) {
1201 if (at91_uarts[i])
1202 platform_device_register(at91_uarts[i]);
1203 }
1204
1205 if (!atmel_default_console_device)
1206 printk(KERN_INFO "AT91: No default serial console defined.\n");
1207 }
1208 #else
1209 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1210 void __init at91_set_serial_console(unsigned portnr) {}
1211 void __init at91_add_device_serial(void) {}
1212 #endif
1213
1214 /* --------------------------------------------------------------------
1215 * CF/IDE
1216 * -------------------------------------------------------------------- */
1217
1218 #if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE) || \
1219 defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
1220
1221 static struct at91_cf_data cf0_data;
1222
1223 static struct resource cf0_resources[] = {
1224 [0] = {
1225 .start = AT91_CHIPSELECT_4,
1226 .end = AT91_CHIPSELECT_4 + SZ_256M - 1,
1227 .flags = IORESOURCE_MEM,
1228 }
1229 };
1230
1231 static struct platform_device cf0_device = {
1232 .id = 0,
1233 .dev = {
1234 .platform_data = &cf0_data,
1235 },
1236 .resource = cf0_resources,
1237 .num_resources = ARRAY_SIZE(cf0_resources),
1238 };
1239
1240 static struct at91_cf_data cf1_data;
1241
1242 static struct resource cf1_resources[] = {
1243 [0] = {
1244 .start = AT91_CHIPSELECT_5,
1245 .end = AT91_CHIPSELECT_5 + SZ_256M - 1,
1246 .flags = IORESOURCE_MEM,
1247 }
1248 };
1249
1250 static struct platform_device cf1_device = {
1251 .id = 1,
1252 .dev = {
1253 .platform_data = &cf1_data,
1254 },
1255 .resource = cf1_resources,
1256 .num_resources = ARRAY_SIZE(cf1_resources),
1257 };
1258
1259 void __init at91_add_device_cf(struct at91_cf_data *data)
1260 {
1261 struct platform_device *pdev;
1262 unsigned long csa;
1263
1264 if (!data)
1265 return;
1266
1267 csa = at91_sys_read(AT91_MATRIX_EBICSA);
1268
1269 switch (data->chipselect) {
1270 case 4:
1271 at91_set_multi_drive(AT91_PIN_PC8, 0);
1272 at91_set_A_periph(AT91_PIN_PC8, 0);
1273 csa |= AT91_MATRIX_CS4A_SMC_CF1;
1274 cf0_data = *data;
1275 pdev = &cf0_device;
1276 break;
1277 case 5:
1278 at91_set_multi_drive(AT91_PIN_PC9, 0);
1279 at91_set_A_periph(AT91_PIN_PC9, 0);
1280 csa |= AT91_MATRIX_CS5A_SMC_CF2;
1281 cf1_data = *data;
1282 pdev = &cf1_device;
1283 break;
1284 default:
1285 printk(KERN_ERR "AT91 CF: bad chip-select requested (%u)\n",
1286 data->chipselect);
1287 return;
1288 }
1289
1290 at91_sys_write(AT91_MATRIX_EBICSA, csa);
1291
1292 if (gpio_is_valid(data->rst_pin)) {
1293 at91_set_multi_drive(data->rst_pin, 0);
1294 at91_set_gpio_output(data->rst_pin, 1);
1295 }
1296
1297 if (gpio_is_valid(data->irq_pin)) {
1298 at91_set_gpio_input(data->irq_pin, 0);
1299 at91_set_deglitch(data->irq_pin, 1);
1300 }
1301
1302 if (gpio_is_valid(data->det_pin)) {
1303 at91_set_gpio_input(data->det_pin, 0);
1304 at91_set_deglitch(data->det_pin, 1);
1305 }
1306
1307 at91_set_B_periph(AT91_PIN_PC6, 0); /* CFCE1 */
1308 at91_set_B_periph(AT91_PIN_PC7, 0); /* CFCE2 */
1309 at91_set_A_periph(AT91_PIN_PC10, 0); /* CFRNW */
1310 at91_set_A_periph(AT91_PIN_PC15, 1); /* NWAIT */
1311
1312 if (data->flags & AT91_CF_TRUE_IDE)
1313 #if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE)
1314 pdev->name = "pata_at91";
1315 #else
1316 #warning "board requires AT91_CF_TRUE_IDE: enable pata_at91"
1317 #endif
1318 else
1319 pdev->name = "at91_cf";
1320
1321 platform_device_register(pdev);
1322 }
1323
1324 #else
1325 void __init at91_add_device_cf(struct at91_cf_data * data) {}
1326 #endif
1327
1328 /* -------------------------------------------------------------------- */
1329 /*
1330 * These devices are always present and don't need any board-specific
1331 * setup.
1332 */
1333 static int __init at91_add_standard_devices(void)
1334 {
1335 at91_add_device_rtt();
1336 at91_add_device_watchdog();
1337 at91_add_device_tc();
1338 return 0;
1339 }
1340
1341 arch_initcall(at91_add_standard_devices);