spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / arm / mach-at91 / include / mach / at91_shdwc.h
blob1d4fe822c77a50fb6ac877b546f1846d1a79f3e9
1 /*
2 * arch/arm/mach-at91/include/mach/at91_shdwc.h
4 * Copyright (C) 2007 Andrew Victor
5 * Copyright (C) 2007 Atmel Corporation.
7 * Shutdown Controller (SHDWC) - System peripherals regsters.
8 * Based on AT91SAM9261 datasheet revision D.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
16 #ifndef AT91_SHDWC_H
17 #define AT91_SHDWC_H
19 #ifndef __ASSEMBLY__
20 extern void __iomem *at91_shdwc_base;
22 #define at91_shdwc_read(field) \
23 __raw_readl(at91_shdwc_base + field)
25 #define at91_shdwc_write(field, value) \
26 __raw_writel(value, at91_shdwc_base + field);
27 #endif
29 #define AT91_SHDW_CR 0x00 /* Shut Down Control Register */
30 #define AT91_SHDW_SHDW (1 << 0) /* Shut Down command */
31 #define AT91_SHDW_KEY (0xa5 << 24) /* KEY Password */
33 #define AT91_SHDW_MR 0x04 /* Shut Down Mode Register */
34 #define AT91_SHDW_WKMODE0 (3 << 0) /* Wake-up 0 Mode Selection */
35 #define AT91_SHDW_WKMODE0_NONE 0
36 #define AT91_SHDW_WKMODE0_HIGH 1
37 #define AT91_SHDW_WKMODE0_LOW 2
38 #define AT91_SHDW_WKMODE0_ANYLEVEL 3
39 #define AT91_SHDW_CPTWK0 (0xf << 4) /* Counter On Wake Up 0 */
40 #define AT91_SHDW_CPTWK0_(x) ((x) << 4)
41 #define AT91_SHDW_RTTWKEN (1 << 16) /* Real Time Timer Wake-up Enable */
43 #define AT91_SHDW_SR 0x08 /* Shut Down Status Register */
44 #define AT91_SHDW_WAKEUP0 (1 << 0) /* Wake-up 0 Status */
45 #define AT91_SHDW_RTTWK (1 << 16) /* Real-time Timer Wake-up */
46 #define AT91_SHDW_RTCWK (1 << 17) /* Real-time Clock Wake-up [SAM9RL] */
48 #endif