spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / arm / mach-at91 / include / mach / irqs.h
blobac8b7dfc85effabb7c86938cd58be4491ab8d813
1 /*
2 * arch/arm/mach-at91/include/mach/irqs.h
4 * Copyright (C) 2004 SAN People
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 #ifndef __ASM_ARCH_IRQS_H
22 #define __ASM_ARCH_IRQS_H
24 #include <linux/io.h>
25 #include <mach/at91_aic.h>
27 #define NR_AIC_IRQS 32
31 * Acknowledge interrupt with AIC after interrupt has been handled.
32 * (by kernel/irq.c)
34 #define irq_finish(irq) do { at91_aic_write(AT91_AIC_EOICR, 0); } while (0)
38 * IRQ interrupt symbols are the AT91xxx_ID_* symbols
39 * for IRQs handled directly through the AIC, or else the AT91_PIN_*
40 * symbols in gpio.h for ones handled indirectly as GPIOs.
41 * We make provision for 5 banks of GPIO.
43 #define NR_IRQS (NR_AIC_IRQS + (5 * 32))
45 /* FIQ is AIC source 0. */
46 #define FIQ_START AT91_ID_FIQ
48 #endif