spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / arm / mach-at91 / soc.h
blob4588ae6f7acd0fda38afa0fee51eb57ac4eb6fa6
1 /*
2 * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
4 * Under GPLv2
5 */
7 struct at91_init_soc {
8 unsigned int *default_irq_priority;
9 void (*map_io)(void);
10 void (*ioremap_registers)(void);
11 void (*register_clocks)(void);
12 void (*init)(void);
15 extern struct at91_init_soc at91_boot_soc;
16 extern struct at91_init_soc at91cap9_soc;
17 extern struct at91_init_soc at91rm9200_soc;
18 extern struct at91_init_soc at91sam9260_soc;
19 extern struct at91_init_soc at91sam9261_soc;
20 extern struct at91_init_soc at91sam9263_soc;
21 extern struct at91_init_soc at91sam9g45_soc;
22 extern struct at91_init_soc at91sam9rl_soc;
23 extern struct at91_init_soc at91sam9x5_soc;
25 static inline int at91_soc_is_enabled(void)
27 return at91_boot_soc.init != NULL;
30 #if !defined(CONFIG_ARCH_AT91CAP9)
31 #define at91cap9_soc at91_boot_soc
32 #endif
34 #if !defined(CONFIG_ARCH_AT91RM9200)
35 #define at91rm9200_soc at91_boot_soc
36 #endif
38 #if !(defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9G20))
39 #define at91sam9260_soc at91_boot_soc
40 #endif
42 #if !(defined(CONFIG_ARCH_AT91SAM9261) || defined(CONFIG_ARCH_AT91SAM9G10))
43 #define at91sam9261_soc at91_boot_soc
44 #endif
46 #if !defined(CONFIG_ARCH_AT91SAM9263)
47 #define at91sam9263_soc at91_boot_soc
48 #endif
50 #if !defined(CONFIG_ARCH_AT91SAM9G45)
51 #define at91sam9g45_soc at91_boot_soc
52 #endif
54 #if !defined(CONFIG_ARCH_AT91SAM9RL)
55 #define at91sam9rl_soc at91_boot_soc
56 #endif
58 #if !defined(CONFIG_ARCH_AT91SAM9X5)
59 #define at91sam9x5_soc at91_boot_soc
60 #endif