spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / arm / mach-ep93xx / include / mach / dma.h
blobe82c642fa53cd49ac88afc412b4194319fc3303f
1 #ifndef __ASM_ARCH_DMA_H
2 #define __ASM_ARCH_DMA_H
4 #include <linux/types.h>
5 #include <linux/dmaengine.h>
6 #include <linux/dma-mapping.h>
8 /*
9 * M2P channels.
11 * Note that these values are also directly used for setting the PPALLOC
12 * register.
14 #define EP93XX_DMA_I2S1 0
15 #define EP93XX_DMA_I2S2 1
16 #define EP93XX_DMA_AAC1 2
17 #define EP93XX_DMA_AAC2 3
18 #define EP93XX_DMA_AAC3 4
19 #define EP93XX_DMA_I2S3 5
20 #define EP93XX_DMA_UART1 6
21 #define EP93XX_DMA_UART2 7
22 #define EP93XX_DMA_UART3 8
23 #define EP93XX_DMA_IRDA 9
24 /* M2M channels */
25 #define EP93XX_DMA_SSP 10
26 #define EP93XX_DMA_IDE 11
28 /**
29 * struct ep93xx_dma_data - configuration data for the EP93xx dmaengine
30 * @port: peripheral which is requesting the channel
31 * @direction: TX/RX channel
32 * @name: optional name for the channel, this is displayed in /proc/interrupts
34 * This information is passed as private channel parameter in a filter
35 * function. Note that this is only needed for slave/cyclic channels. For
36 * memcpy channels %NULL data should be passed.
38 struct ep93xx_dma_data {
39 int port;
40 enum dma_transfer_direction direction;
41 const char *name;
44 /**
45 * struct ep93xx_dma_chan_data - platform specific data for a DMA channel
46 * @name: name of the channel, used for getting the right clock for the channel
47 * @base: mapped registers
48 * @irq: interrupt number used by this channel
50 struct ep93xx_dma_chan_data {
51 const char *name;
52 void __iomem *base;
53 int irq;
56 /**
57 * struct ep93xx_dma_platform_data - platform data for the dmaengine driver
58 * @channels: array of channels which are passed to the driver
59 * @num_channels: number of channels in the array
61 * This structure is passed to the DMA engine driver via platform data. For
62 * M2P channels, contract is that even channels are for TX and odd for RX.
63 * There is no requirement for the M2M channels.
65 struct ep93xx_dma_platform_data {
66 struct ep93xx_dma_chan_data *channels;
67 size_t num_channels;
70 static inline bool ep93xx_dma_chan_is_m2p(struct dma_chan *chan)
72 return !strcmp(dev_name(chan->device->dev), "ep93xx-dma-m2p");
75 /**
76 * ep93xx_dma_chan_direction - returns direction the channel can be used
77 * @chan: channel
79 * This function can be used in filter functions to find out whether the
80 * channel supports given DMA direction. Only M2P channels have such
81 * limitation, for M2M channels the direction is configurable.
83 static inline enum dma_transfer_direction
84 ep93xx_dma_chan_direction(struct dma_chan *chan)
86 if (!ep93xx_dma_chan_is_m2p(chan))
87 return DMA_NONE;
89 /* even channels are for TX, odd for RX */
90 return (chan->chan_id % 2 == 0) ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM;
93 #endif /* __ASM_ARCH_DMA_H */