spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / arm / mach-ep93xx / include / mach / hardware.h
blob4df842897eae8900408fe79469b20dd5e651211a
1 /*
2 * arch/arm/mach-ep93xx/include/mach/hardware.h
3 */
5 #ifndef __ASM_ARCH_HARDWARE_H
6 #define __ASM_ARCH_HARDWARE_H
8 #include <mach/ep93xx-regs.h>
9 #include <mach/platform.h>
12 * The EP93xx has two external crystal oscillators. To generate the
13 * required high-frequency clocks, the processor uses two phase-locked-
14 * loops (PLLs) to multiply the incoming external clock signal to much
15 * higher frequencies that are then divided down by programmable dividers
16 * to produce the needed clocks. The PLLs operate independently of one
17 * another.
19 #define EP93XX_EXT_CLK_RATE 14745600
20 #define EP93XX_EXT_RTC_RATE 32768
22 #define EP93XX_KEYTCHCLK_DIV4 (EP93XX_EXT_CLK_RATE / 4)
23 #define EP93XX_KEYTCHCLK_DIV16 (EP93XX_EXT_CLK_RATE / 16)
25 #endif