spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / arm / mach-ep93xx / include / mach / irqs.h
blobff98390bbf0ffebd4c21481bd8a279cb03b8c020
1 /*
2 * arch/arm/mach-ep93xx/include/mach/irqs.h
3 */
5 #ifndef __ASM_ARCH_IRQS_H
6 #define __ASM_ARCH_IRQS_H
8 #define IRQ_EP93XX_COMMRX 2
9 #define IRQ_EP93XX_COMMTX 3
10 #define IRQ_EP93XX_TIMER1 4
11 #define IRQ_EP93XX_TIMER2 5
12 #define IRQ_EP93XX_AACINTR 6
13 #define IRQ_EP93XX_DMAM2P0 7
14 #define IRQ_EP93XX_DMAM2P1 8
15 #define IRQ_EP93XX_DMAM2P2 9
16 #define IRQ_EP93XX_DMAM2P3 10
17 #define IRQ_EP93XX_DMAM2P4 11
18 #define IRQ_EP93XX_DMAM2P5 12
19 #define IRQ_EP93XX_DMAM2P6 13
20 #define IRQ_EP93XX_DMAM2P7 14
21 #define IRQ_EP93XX_DMAM2P8 15
22 #define IRQ_EP93XX_DMAM2P9 16
23 #define IRQ_EP93XX_DMAM2M0 17
24 #define IRQ_EP93XX_DMAM2M1 18
25 #define IRQ_EP93XX_GPIO0MUX 19
26 #define IRQ_EP93XX_GPIO1MUX 20
27 #define IRQ_EP93XX_GPIO2MUX 21
28 #define IRQ_EP93XX_GPIO3MUX 22
29 #define IRQ_EP93XX_UART1RX 23
30 #define IRQ_EP93XX_UART1TX 24
31 #define IRQ_EP93XX_UART2RX 25
32 #define IRQ_EP93XX_UART2TX 26
33 #define IRQ_EP93XX_UART3RX 27
34 #define IRQ_EP93XX_UART3TX 28
35 #define IRQ_EP93XX_KEY 29
36 #define IRQ_EP93XX_TOUCH 30
37 #define EP93XX_VIC1_VALID_IRQ_MASK 0x7ffffffc
39 #define IRQ_EP93XX_EXT0 32
40 #define IRQ_EP93XX_EXT1 33
41 #define IRQ_EP93XX_EXT2 34
42 #define IRQ_EP93XX_64HZ 35
43 #define IRQ_EP93XX_WATCHDOG 36
44 #define IRQ_EP93XX_RTC 37
45 #define IRQ_EP93XX_IRDA 38
46 #define IRQ_EP93XX_ETHERNET 39
47 #define IRQ_EP93XX_EXT3 40
48 #define IRQ_EP93XX_PROG 41
49 #define IRQ_EP93XX_1HZ 42
50 #define IRQ_EP93XX_VSYNC 43
51 #define IRQ_EP93XX_VIDEO_FIFO 44
52 #define IRQ_EP93XX_SSP1RX 45
53 #define IRQ_EP93XX_SSP1TX 46
54 #define IRQ_EP93XX_GPIO4MUX 47
55 #define IRQ_EP93XX_GPIO5MUX 48
56 #define IRQ_EP93XX_GPIO6MUX 49
57 #define IRQ_EP93XX_GPIO7MUX 50
58 #define IRQ_EP93XX_TIMER3 51
59 #define IRQ_EP93XX_UART1 52
60 #define IRQ_EP93XX_SSP 53
61 #define IRQ_EP93XX_UART2 54
62 #define IRQ_EP93XX_UART3 55
63 #define IRQ_EP93XX_USB 56
64 #define IRQ_EP93XX_ETHERNET_PME 57
65 #define IRQ_EP93XX_DSP 58
66 #define IRQ_EP93XX_GPIO_AB 59
67 #define IRQ_EP93XX_SAI 60
68 #define EP93XX_VIC2_VALID_IRQ_MASK 0x1fffffff
70 #define NR_EP93XX_IRQS (64 + 24)
72 #define EP93XX_BOARD_IRQ(x) (NR_EP93XX_IRQS + (x))
73 #define EP93XX_BOARD_IRQS 32
75 #define NR_IRQS (NR_EP93XX_IRQS + EP93XX_BOARD_IRQS)
78 #endif