spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / arm / mach-ep93xx / include / mach / uncompress.h
blob16026c2b1c8c0f36843baf6378e0114a22b0fa03
1 /*
2 * arch/arm/mach-ep93xx/include/mach/uncompress.h
4 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or (at
9 * your option) any later version.
12 #include <mach/ep93xx-regs.h>
14 static unsigned char __raw_readb(unsigned int ptr)
16 return *((volatile unsigned char *)ptr);
19 static unsigned int __raw_readl(unsigned int ptr)
21 return *((volatile unsigned int *)ptr);
24 static void __raw_writeb(unsigned char value, unsigned int ptr)
26 *((volatile unsigned char *)ptr) = value;
29 static void __raw_writel(unsigned int value, unsigned int ptr)
31 *((volatile unsigned int *)ptr) = value;
34 #if defined(CONFIG_EP93XX_EARLY_UART1)
35 #define UART_BASE EP93XX_UART1_PHYS_BASE
36 #elif defined(CONFIG_EP93XX_EARLY_UART2)
37 #define UART_BASE EP93XX_UART2_PHYS_BASE
38 #elif defined(CONFIG_EP93XX_EARLY_UART3)
39 #define UART_BASE EP93XX_UART3_PHYS_BASE
40 #else
41 #define UART_BASE EP93XX_UART1_PHYS_BASE
42 #endif
44 #define PHYS_UART_DATA (UART_BASE + 0x00)
45 #define PHYS_UART_FLAG (UART_BASE + 0x18)
46 #define UART_FLAG_TXFF 0x20
48 static inline void putc(int c)
50 int i;
52 for (i = 0; i < 1000; i++) {
53 /* Transmit fifo not full? */
54 if (!(__raw_readb(PHYS_UART_FLAG) & UART_FLAG_TXFF))
55 break;
58 __raw_writeb(c, PHYS_UART_DATA);
61 static inline void flush(void)
67 * Some bootloaders don't turn off DMA from the ethernet MAC before
68 * jumping to linux, which means that we might end up with bits of RX
69 * status and packet data scribbled over the uncompressed kernel image.
70 * Work around this by resetting the ethernet MAC before we uncompress.
72 #define PHYS_ETH_SELF_CTL 0x80010020
73 #define ETH_SELF_CTL_RESET 0x00000001
75 static void ethernet_reset(void)
77 unsigned int v;
79 /* Reset the ethernet MAC. */
80 v = __raw_readl(PHYS_ETH_SELF_CTL);
81 __raw_writel(v | ETH_SELF_CTL_RESET, PHYS_ETH_SELF_CTL);
83 /* Wait for reset to finish. */
84 while (__raw_readl(PHYS_ETH_SELF_CTL) & ETH_SELF_CTL_RESET)
89 static void arch_decomp_setup(void)
91 ethernet_reset();
94 #define arch_decomp_wdog()