1 /* linux/arch/arm/mach-exynos4/mach-origen.c
3 * Copyright (c) 2011 Insignal Co., Ltd.
4 * http://www.insignal.co.kr/
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/serial_core.h>
12 #include <linux/gpio.h>
13 #include <linux/mmc/host.h>
14 #include <linux/platform_device.h>
16 #include <linux/input.h>
17 #include <linux/pwm_backlight.h>
18 #include <linux/gpio_keys.h>
19 #include <linux/i2c.h>
20 #include <linux/regulator/machine.h>
21 #include <linux/mfd/max8997.h>
22 #include <linux/lcd.h>
24 #include <asm/mach/arch.h>
25 #include <asm/hardware/gic.h>
26 #include <asm/mach-types.h>
28 #include <video/platform_lcd.h>
30 #include <plat/regs-serial.h>
31 #include <plat/regs-fb-v4.h>
33 #include <plat/devs.h>
34 #include <plat/sdhci.h>
36 #include <plat/ehci.h>
37 #include <plat/clock.h>
38 #include <plat/gpio-cfg.h>
39 #include <plat/backlight.h>
44 #include <mach/ohci.h>
49 /* Following are default values for UCON, ULCON and UFCON UART registers */
50 #define ORIGEN_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
51 S3C2410_UCON_RXILEVEL | \
52 S3C2410_UCON_TXIRQMODE | \
53 S3C2410_UCON_RXIRQMODE | \
54 S3C2410_UCON_RXFIFO_TOI | \
55 S3C2443_UCON_RXERR_IRQEN)
57 #define ORIGEN_ULCON_DEFAULT S3C2410_LCON_CS8
59 #define ORIGEN_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
60 S5PV210_UFCON_TXTRIG4 | \
61 S5PV210_UFCON_RXTRIG4)
63 static struct s3c2410_uartcfg origen_uartcfgs
[] __initdata
= {
67 .ucon
= ORIGEN_UCON_DEFAULT
,
68 .ulcon
= ORIGEN_ULCON_DEFAULT
,
69 .ufcon
= ORIGEN_UFCON_DEFAULT
,
74 .ucon
= ORIGEN_UCON_DEFAULT
,
75 .ulcon
= ORIGEN_ULCON_DEFAULT
,
76 .ufcon
= ORIGEN_UFCON_DEFAULT
,
81 .ucon
= ORIGEN_UCON_DEFAULT
,
82 .ulcon
= ORIGEN_ULCON_DEFAULT
,
83 .ufcon
= ORIGEN_UFCON_DEFAULT
,
88 .ucon
= ORIGEN_UCON_DEFAULT
,
89 .ulcon
= ORIGEN_ULCON_DEFAULT
,
90 .ufcon
= ORIGEN_UFCON_DEFAULT
,
94 static struct regulator_consumer_supply __initdata ldo3_consumer
[] = {
95 REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"), /* MIPI */
96 REGULATOR_SUPPLY("vdd", "exynos4-hdmi"), /* HDMI */
97 REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"), /* HDMI */
99 static struct regulator_consumer_supply __initdata ldo6_consumer
[] = {
100 REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"), /* MIPI */
102 static struct regulator_consumer_supply __initdata ldo7_consumer
[] = {
103 REGULATOR_SUPPLY("avdd", "alc5625"), /* Realtek ALC5625 */
105 static struct regulator_consumer_supply __initdata ldo8_consumer
[] = {
106 REGULATOR_SUPPLY("vdd", "s5p-adc"), /* ADC */
107 REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"), /* HDMI */
109 static struct regulator_consumer_supply __initdata ldo9_consumer
[] = {
110 REGULATOR_SUPPLY("dvdd", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
112 static struct regulator_consumer_supply __initdata ldo11_consumer
[] = {
113 REGULATOR_SUPPLY("dvdd", "alc5625"), /* Realtek ALC5625 */
115 static struct regulator_consumer_supply __initdata ldo14_consumer
[] = {
116 REGULATOR_SUPPLY("avdd18", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
118 static struct regulator_consumer_supply __initdata ldo17_consumer
[] = {
119 REGULATOR_SUPPLY("vdd33", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
121 static struct regulator_consumer_supply __initdata buck1_consumer
[] = {
122 REGULATOR_SUPPLY("vdd_arm", NULL
), /* CPUFREQ */
124 static struct regulator_consumer_supply __initdata buck2_consumer
[] = {
125 REGULATOR_SUPPLY("vdd_int", NULL
), /* CPUFREQ */
127 static struct regulator_consumer_supply __initdata buck3_consumer
[] = {
128 REGULATOR_SUPPLY("vdd_g3d", "mali_drm"), /* G3D */
130 static struct regulator_consumer_supply __initdata buck7_consumer
[] = {
131 REGULATOR_SUPPLY("vcc", "platform-lcd"), /* LCD */
134 static struct regulator_init_data __initdata max8997_ldo1_data
= {
136 .name
= "VDD_ABB_3.3V",
146 static struct regulator_init_data __initdata max8997_ldo2_data
= {
148 .name
= "VDD_ALIVE_1.1V",
159 static struct regulator_init_data __initdata max8997_ldo3_data
= {
161 .name
= "VMIPI_1.1V",
165 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
170 .num_consumer_supplies
= ARRAY_SIZE(ldo3_consumer
),
171 .consumer_supplies
= ldo3_consumer
,
174 static struct regulator_init_data __initdata max8997_ldo4_data
= {
176 .name
= "VDD_RTC_1.8V",
187 static struct regulator_init_data __initdata max8997_ldo6_data
= {
189 .name
= "VMIPI_1.8V",
193 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
198 .num_consumer_supplies
= ARRAY_SIZE(ldo6_consumer
),
199 .consumer_supplies
= ldo6_consumer
,
202 static struct regulator_init_data __initdata max8997_ldo7_data
= {
204 .name
= "VDD_AUD_1.8V",
208 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
213 .num_consumer_supplies
= ARRAY_SIZE(ldo7_consumer
),
214 .consumer_supplies
= ldo7_consumer
,
217 static struct regulator_init_data __initdata max8997_ldo8_data
= {
223 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
228 .num_consumer_supplies
= ARRAY_SIZE(ldo8_consumer
),
229 .consumer_supplies
= ldo8_consumer
,
232 static struct regulator_init_data __initdata max8997_ldo9_data
= {
234 .name
= "DVDD_SWB_2.8V",
238 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
243 .num_consumer_supplies
= ARRAY_SIZE(ldo9_consumer
),
244 .consumer_supplies
= ldo9_consumer
,
247 static struct regulator_init_data __initdata max8997_ldo10_data
= {
249 .name
= "VDD_PLL_1.1V",
260 static struct regulator_init_data __initdata max8997_ldo11_data
= {
262 .name
= "VDD_AUD_3V",
266 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
271 .num_consumer_supplies
= ARRAY_SIZE(ldo11_consumer
),
272 .consumer_supplies
= ldo11_consumer
,
275 static struct regulator_init_data __initdata max8997_ldo14_data
= {
277 .name
= "AVDD18_SWB_1.8V",
281 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
286 .num_consumer_supplies
= ARRAY_SIZE(ldo14_consumer
),
287 .consumer_supplies
= ldo14_consumer
,
290 static struct regulator_init_data __initdata max8997_ldo17_data
= {
292 .name
= "VDD_SWB_3.3V",
296 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
301 .num_consumer_supplies
= ARRAY_SIZE(ldo17_consumer
),
302 .consumer_supplies
= ldo17_consumer
,
305 static struct regulator_init_data __initdata max8997_ldo21_data
= {
307 .name
= "VDD_MIF_1.2V",
318 static struct regulator_init_data __initdata max8997_buck1_data
= {
320 .name
= "VDD_ARM_1.2V",
325 .valid_ops_mask
= REGULATOR_CHANGE_VOLTAGE
,
330 .num_consumer_supplies
= ARRAY_SIZE(buck1_consumer
),
331 .consumer_supplies
= buck1_consumer
,
334 static struct regulator_init_data __initdata max8997_buck2_data
= {
336 .name
= "VDD_INT_1.1V",
341 .valid_ops_mask
= REGULATOR_CHANGE_VOLTAGE
,
346 .num_consumer_supplies
= ARRAY_SIZE(buck2_consumer
),
347 .consumer_supplies
= buck2_consumer
,
350 static struct regulator_init_data __initdata max8997_buck3_data
= {
352 .name
= "VDD_G3D_1.1V",
355 .valid_ops_mask
= REGULATOR_CHANGE_VOLTAGE
|
356 REGULATOR_CHANGE_STATUS
,
361 .num_consumer_supplies
= ARRAY_SIZE(buck3_consumer
),
362 .consumer_supplies
= buck3_consumer
,
365 static struct regulator_init_data __initdata max8997_buck5_data
= {
367 .name
= "VDDQ_M1M2_1.2V",
378 static struct regulator_init_data __initdata max8997_buck7_data
= {
380 .name
= "VDD_LCD_3.3V",
385 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
390 .num_consumer_supplies
= ARRAY_SIZE(buck7_consumer
),
391 .consumer_supplies
= buck7_consumer
,
394 static struct max8997_regulator_data __initdata origen_max8997_regulators
[] = {
395 { MAX8997_LDO1
, &max8997_ldo1_data
},
396 { MAX8997_LDO2
, &max8997_ldo2_data
},
397 { MAX8997_LDO3
, &max8997_ldo3_data
},
398 { MAX8997_LDO4
, &max8997_ldo4_data
},
399 { MAX8997_LDO6
, &max8997_ldo6_data
},
400 { MAX8997_LDO7
, &max8997_ldo7_data
},
401 { MAX8997_LDO8
, &max8997_ldo8_data
},
402 { MAX8997_LDO9
, &max8997_ldo9_data
},
403 { MAX8997_LDO10
, &max8997_ldo10_data
},
404 { MAX8997_LDO11
, &max8997_ldo11_data
},
405 { MAX8997_LDO14
, &max8997_ldo14_data
},
406 { MAX8997_LDO17
, &max8997_ldo17_data
},
407 { MAX8997_LDO21
, &max8997_ldo21_data
},
408 { MAX8997_BUCK1
, &max8997_buck1_data
},
409 { MAX8997_BUCK2
, &max8997_buck2_data
},
410 { MAX8997_BUCK3
, &max8997_buck3_data
},
411 { MAX8997_BUCK5
, &max8997_buck5_data
},
412 { MAX8997_BUCK7
, &max8997_buck7_data
},
415 struct max8997_platform_data __initdata origen_max8997_pdata
= {
416 .num_regulators
= ARRAY_SIZE(origen_max8997_regulators
),
417 .regulators
= origen_max8997_regulators
,
420 .buck1_gpiodvs
= false,
421 .buck2_gpiodvs
= false,
422 .buck5_gpiodvs
= false,
423 .irq_base
= IRQ_GPIO_END
+ 1,
425 .ignore_gpiodvs_side_effect
= true,
426 .buck125_default_idx
= 0x0,
428 .buck125_gpios
[0] = EXYNOS4_GPX0(0),
429 .buck125_gpios
[1] = EXYNOS4_GPX0(1),
430 .buck125_gpios
[2] = EXYNOS4_GPX0(2),
432 .buck1_voltage
[0] = 1350000,
433 .buck1_voltage
[1] = 1300000,
434 .buck1_voltage
[2] = 1250000,
435 .buck1_voltage
[3] = 1200000,
436 .buck1_voltage
[4] = 1150000,
437 .buck1_voltage
[5] = 1100000,
438 .buck1_voltage
[6] = 1000000,
439 .buck1_voltage
[7] = 950000,
441 .buck2_voltage
[0] = 1100000,
442 .buck2_voltage
[1] = 1100000,
443 .buck2_voltage
[2] = 1100000,
444 .buck2_voltage
[3] = 1100000,
445 .buck2_voltage
[4] = 1000000,
446 .buck2_voltage
[5] = 1000000,
447 .buck2_voltage
[6] = 1000000,
448 .buck2_voltage
[7] = 1000000,
450 .buck5_voltage
[0] = 1200000,
451 .buck5_voltage
[1] = 1200000,
452 .buck5_voltage
[2] = 1200000,
453 .buck5_voltage
[3] = 1200000,
454 .buck5_voltage
[4] = 1200000,
455 .buck5_voltage
[5] = 1200000,
456 .buck5_voltage
[6] = 1200000,
457 .buck5_voltage
[7] = 1200000,
461 static struct i2c_board_info i2c0_devs
[] __initdata
= {
463 I2C_BOARD_INFO("max8997", (0xCC >> 1)),
464 .platform_data
= &origen_max8997_pdata
,
469 static struct s3c_sdhci_platdata origen_hsmmc0_pdata __initdata
= {
470 .cd_type
= S3C_SDHCI_CD_INTERNAL
,
471 .clk_type
= S3C_SDHCI_CLK_DIV_EXTERNAL
,
474 static struct s3c_sdhci_platdata origen_hsmmc2_pdata __initdata
= {
475 .cd_type
= S3C_SDHCI_CD_INTERNAL
,
476 .clk_type
= S3C_SDHCI_CLK_DIV_EXTERNAL
,
480 static struct s5p_ehci_platdata origen_ehci_pdata
;
482 static void __init
origen_ehci_init(void)
484 struct s5p_ehci_platdata
*pdata
= &origen_ehci_pdata
;
486 s5p_ehci_set_platdata(pdata
);
490 static struct exynos4_ohci_platdata origen_ohci_pdata
;
492 static void __init
origen_ohci_init(void)
494 struct exynos4_ohci_platdata
*pdata
= &origen_ohci_pdata
;
496 exynos4_ohci_set_platdata(pdata
);
499 static struct gpio_keys_button origen_gpio_keys_table
[] = {
502 .gpio
= EXYNOS4_GPX1(5),
503 .desc
= "gpio-keys: KEY_MENU",
507 .debounce_interval
= 1,
510 .gpio
= EXYNOS4_GPX1(6),
511 .desc
= "gpio-keys: KEY_HOME",
515 .debounce_interval
= 1,
518 .gpio
= EXYNOS4_GPX1(7),
519 .desc
= "gpio-keys: KEY_BACK",
523 .debounce_interval
= 1,
526 .gpio
= EXYNOS4_GPX2(0),
527 .desc
= "gpio-keys: KEY_UP",
531 .debounce_interval
= 1,
534 .gpio
= EXYNOS4_GPX2(1),
535 .desc
= "gpio-keys: KEY_DOWN",
539 .debounce_interval
= 1,
543 static struct gpio_keys_platform_data origen_gpio_keys_data
= {
544 .buttons
= origen_gpio_keys_table
,
545 .nbuttons
= ARRAY_SIZE(origen_gpio_keys_table
),
548 static struct platform_device origen_device_gpiokeys
= {
551 .platform_data
= &origen_gpio_keys_data
,
555 static void lcd_hv070wsa_set_power(struct plat_lcd_data
*pd
, unsigned int power
)
560 ret
= gpio_request_one(EXYNOS4_GPE3(4),
561 GPIOF_OUT_INIT_HIGH
, "GPE3_4");
563 ret
= gpio_request_one(EXYNOS4_GPE3(4),
564 GPIOF_OUT_INIT_LOW
, "GPE3_4");
566 gpio_free(EXYNOS4_GPE3(4));
569 pr_err("failed to request gpio for LCD power: %d\n", ret
);
572 static struct plat_lcd_data origen_lcd_hv070wsa_data
= {
573 .set_power
= lcd_hv070wsa_set_power
,
576 static struct platform_device origen_lcd_hv070wsa
= {
577 .name
= "platform-lcd",
578 .dev
.parent
= &s5p_device_fimd0
.dev
,
579 .dev
.platform_data
= &origen_lcd_hv070wsa_data
,
582 static struct s3c_fb_pd_win origen_fb_win0
= {
597 static struct s3c_fb_platdata origen_lcd_pdata __initdata
= {
598 .win
[0] = &origen_fb_win0
,
599 .vidcon0
= VIDCON0_VIDOUT_RGB
| VIDCON0_PNRMODE_RGB
,
600 .vidcon1
= VIDCON1_INV_HSYNC
| VIDCON1_INV_VSYNC
|
602 .setup_gpio
= exynos4_fimd0_gpio_setup_24bpp
,
605 static struct platform_device
*origen_devices
[] __initdata
= {
618 &s5p_device_i2c_hdmiphy
,
623 &exynos4_device_ohci
,
624 &exynos4_device_pd
[PD_LCD0
],
625 &exynos4_device_pd
[PD_TV
],
626 &exynos4_device_pd
[PD_G3D
],
627 &exynos4_device_pd
[PD_LCD1
],
628 &exynos4_device_pd
[PD_CAM
],
629 &exynos4_device_pd
[PD_GPS
],
630 &exynos4_device_pd
[PD_MFC
],
631 &origen_device_gpiokeys
,
632 &origen_lcd_hv070wsa
,
635 /* LCD Backlight data */
636 static struct samsung_bl_gpio_info origen_bl_gpio_info
= {
637 .no
= EXYNOS4_GPD0(0),
638 .func
= S3C_GPIO_SFN(2),
641 static struct platform_pwm_backlight_data origen_bl_data
= {
643 .pwm_period_ns
= 1000,
646 static void s5p_tv_setup(void)
648 /* Direct HPD to HDMI chip */
649 gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN
, "hpd-plug");
650 s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
651 s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE
);
654 static void __init
origen_map_io(void)
656 exynos_init_io(NULL
, 0);
657 s3c24xx_init_clocks(24000000);
658 s3c24xx_init_uarts(origen_uartcfgs
, ARRAY_SIZE(origen_uartcfgs
));
661 static void __init
origen_power_init(void)
663 gpio_request(EXYNOS4_GPX0(4), "PMIC_IRQ");
664 s3c_gpio_cfgpin(EXYNOS4_GPX0(4), S3C_GPIO_SFN(0xf));
665 s3c_gpio_setpull(EXYNOS4_GPX0(4), S3C_GPIO_PULL_NONE
);
668 static void __init
origen_reserve(void)
670 s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
673 static void __init
origen_machine_init(void)
677 s3c_i2c0_set_platdata(NULL
);
678 i2c_register_board_info(0, i2c0_devs
, ARRAY_SIZE(i2c0_devs
));
681 * Since sdhci instance 2 can contain a bootable media,
682 * sdhci instance 0 is registered after instance 2.
684 s3c_sdhci2_set_platdata(&origen_hsmmc2_pdata
);
685 s3c_sdhci0_set_platdata(&origen_hsmmc0_pdata
);
689 clk_xusbxti
.rate
= 24000000;
692 s5p_i2c_hdmiphy_set_platdata(NULL
);
694 s5p_fimd0_set_platdata(&origen_lcd_pdata
);
696 platform_add_devices(origen_devices
, ARRAY_SIZE(origen_devices
));
698 s5p_device_fimd0
.dev
.parent
= &exynos4_device_pd
[PD_LCD0
].dev
;
700 s5p_device_hdmi
.dev
.parent
= &exynos4_device_pd
[PD_TV
].dev
;
701 s5p_device_mixer
.dev
.parent
= &exynos4_device_pd
[PD_TV
].dev
;
703 s5p_device_mfc
.dev
.parent
= &exynos4_device_pd
[PD_MFC
].dev
;
705 samsung_bl_set(&origen_bl_gpio_info
, &origen_bl_data
);
708 MACHINE_START(ORIGEN
, "ORIGEN")
709 /* Maintainer: JeongHyeon Kim <jhkim@insignal.co.kr> */
710 .atag_offset
= 0x100,
711 .init_irq
= exynos4_init_irq
,
712 .map_io
= origen_map_io
,
713 .handle_irq
= gic_handle_irq
,
714 .init_machine
= origen_machine_init
,
715 .timer
= &exynos4_timer
,
716 .reserve
= &origen_reserve
,
717 .restart
= exynos4_restart
,