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spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / arm / mach-exynos / mach-universal_c210.c
blob38939956c34f7097958eda9fcd8690feac4e84ba
1 /* linux/arch/arm/mach-exynos4/mach-universal_c210.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
10 #include <linux/platform_device.h>
11 #include <linux/serial_core.h>
12 #include <linux/input.h>
13 #include <linux/i2c.h>
14 #include <linux/gpio_keys.h>
15 #include <linux/gpio.h>
16 #include <linux/interrupt.h>
17 #include <linux/fb.h>
18 #include <linux/mfd/max8998.h>
19 #include <linux/regulator/machine.h>
20 #include <linux/regulator/fixed.h>
21 #include <linux/regulator/max8952.h>
22 #include <linux/mmc/host.h>
23 #include <linux/i2c-gpio.h>
24 #include <linux/i2c/mcs.h>
25 #include <linux/i2c/atmel_mxt_ts.h>
26
27 #include <asm/mach/arch.h>
28 #include <asm/hardware/gic.h>
29 #include <asm/mach-types.h>
30
31 #include <plat/regs-serial.h>
32 #include <plat/cpu.h>
33 #include <plat/devs.h>
34 #include <plat/iic.h>
35 #include <plat/gpio-cfg.h>
36 #include <plat/fb.h>
37 #include <plat/mfc.h>
38 #include <plat/sdhci.h>
39 #include <plat/pd.h>
40 #include <plat/regs-fb-v4.h>
41 #include <plat/fimc-core.h>
42 #include <plat/camport.h>
43 #include <plat/mipi_csis.h>
44
45 #include <mach/map.h>
46
47 #include <media/v4l2-mediabus.h>
48 #include <media/s5p_fimc.h>
49 #include <media/m5mols.h>
50
51 #include "common.h"
52
53 /* Following are default values for UCON, ULCON and UFCON UART registers */
54 #define UNIVERSAL_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
55 S3C2410_UCON_RXILEVEL | \
56 S3C2410_UCON_TXIRQMODE | \
57 S3C2410_UCON_RXIRQMODE | \
58 S3C2410_UCON_RXFIFO_TOI | \
59 S3C2443_UCON_RXERR_IRQEN)
60
61 #define UNIVERSAL_ULCON_DEFAULT S3C2410_LCON_CS8
62
63 #define UNIVERSAL_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
64 S5PV210_UFCON_TXTRIG256 | \
65 S5PV210_UFCON_RXTRIG256)
66
67 static struct s3c2410_uartcfg universal_uartcfgs[] __initdata = {
68 [0] = {
69 .hwport = 0,
70 .ucon = UNIVERSAL_UCON_DEFAULT,
71 .ulcon = UNIVERSAL_ULCON_DEFAULT,
72 .ufcon = UNIVERSAL_UFCON_DEFAULT,
73 },
74 [1] = {
75 .hwport = 1,
76 .ucon = UNIVERSAL_UCON_DEFAULT,
77 .ulcon = UNIVERSAL_ULCON_DEFAULT,
78 .ufcon = UNIVERSAL_UFCON_DEFAULT,
79 },
80 [2] = {
81 .hwport = 2,
82 .ucon = UNIVERSAL_UCON_DEFAULT,
83 .ulcon = UNIVERSAL_ULCON_DEFAULT,
84 .ufcon = UNIVERSAL_UFCON_DEFAULT,
85 },
86 [3] = {
87 .hwport = 3,
88 .ucon = UNIVERSAL_UCON_DEFAULT,
89 .ulcon = UNIVERSAL_ULCON_DEFAULT,
90 .ufcon = UNIVERSAL_UFCON_DEFAULT,
91 },
92 };
93
94 static struct regulator_consumer_supply max8952_consumer =
95 REGULATOR_SUPPLY("vdd_arm", NULL);
96
97 static struct max8952_platform_data universal_max8952_pdata __initdata = {
98 .gpio_vid0 = EXYNOS4_GPX0(3),
99 .gpio_vid1 = EXYNOS4_GPX0(4),
100 .gpio_en = -1, /* Not controllable, set "Always High" */
101 .default_mode = 0, /* vid0 = 0, vid1 = 0 */
102 .dvs_mode = { 48, 32, 28, 18 }, /* 1.25, 1.20, 1.05, 0.95V */
103 .sync_freq = 0, /* default: fastest */
104 .ramp_speed = 0, /* default: fastest */
105
106 .reg_data = {
107 .constraints = {
108 .name = "VARM_1.2V",
109 .min_uV = 770000,
110 .max_uV = 1400000,
111 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
112 .always_on = 1,
113 .boot_on = 1,
114 },
115 .num_consumer_supplies = 1,
116 .consumer_supplies = &max8952_consumer,
117 },
118 };
119
120 static struct regulator_consumer_supply lp3974_buck1_consumer =
121 REGULATOR_SUPPLY("vdd_int", NULL);
122
123 static struct regulator_consumer_supply lp3974_buck2_consumer =
124 REGULATOR_SUPPLY("vddg3d", NULL);
125
126 static struct regulator_consumer_supply lp3974_buck3_consumer =
127 REGULATOR_SUPPLY("vdet", "s5p-sdo");
128
129 static struct regulator_init_data lp3974_buck1_data = {
130 .constraints = {
131 .name = "VINT_1.1V",
132 .min_uV = 750000,
133 .max_uV = 1500000,
134 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
135 REGULATOR_CHANGE_STATUS,
136 .boot_on = 1,
137 .state_mem = {
138 .disabled = 1,
139 },
140 },
141 .num_consumer_supplies = 1,
142 .consumer_supplies = &lp3974_buck1_consumer,
143 };
144
145 static struct regulator_init_data lp3974_buck2_data = {
146 .constraints = {
147 .name = "VG3D_1.1V",
148 .min_uV = 750000,
149 .max_uV = 1500000,
150 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
151 REGULATOR_CHANGE_STATUS,
152 .boot_on = 1,
153 .state_mem = {
154 .disabled = 1,
155 },
156 },
157 .num_consumer_supplies = 1,
158 .consumer_supplies = &lp3974_buck2_consumer,
159 };
160
161 static struct regulator_init_data lp3974_buck3_data = {
162 .constraints = {
163 .name = "VCC_1.8V",
164 .min_uV = 1800000,
165 .max_uV = 1800000,
166 .apply_uV = 1,
167 .always_on = 1,
168 .state_mem = {
169 .enabled = 1,
170 },
171 },
172 .num_consumer_supplies = 1,
173 .consumer_supplies = &lp3974_buck3_consumer,
174 };
175
176 static struct regulator_init_data lp3974_buck4_data = {
177 .constraints = {
178 .name = "VMEM_1.2V",
179 .min_uV = 1200000,
180 .max_uV = 1200000,
181 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
182 .apply_uV = 1,
183 .state_mem = {
184 .disabled = 1,
185 },
186 },
187 };
188
189 static struct regulator_init_data lp3974_ldo2_data = {
190 .constraints = {
191 .name = "VALIVE_1.2V",
192 .min_uV = 1200000,
193 .max_uV = 1200000,
194 .apply_uV = 1,
195 .always_on = 1,
196 .state_mem = {
197 .enabled = 1,
198 },
199 },
200 };
201
202 static struct regulator_consumer_supply lp3974_ldo3_consumer[] = {
203 REGULATOR_SUPPLY("vdd", "exynos4-hdmi"),
204 REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"),
205 REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"),
206 };
207
208 static struct regulator_init_data lp3974_ldo3_data = {
209 .constraints = {
210 .name = "VUSB+MIPI_1.1V",
211 .min_uV = 1100000,
212 .max_uV = 1100000,
213 .apply_uV = 1,
214 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
215 .state_mem = {
216 .disabled = 1,
217 },
218 },
219 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo3_consumer),
220 .consumer_supplies = lp3974_ldo3_consumer,
221 };
222
223 static struct regulator_consumer_supply lp3974_ldo4_consumer[] = {
224 REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"),
225 };
226
227 static struct regulator_init_data lp3974_ldo4_data = {
228 .constraints = {
229 .name = "VADC_3.3V",
230 .min_uV = 3300000,
231 .max_uV = 3300000,
232 .apply_uV = 1,
233 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
234 .state_mem = {
235 .disabled = 1,
236 },
237 },
238 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo4_consumer),
239 .consumer_supplies = lp3974_ldo4_consumer,
240 };
241
242 static struct regulator_init_data lp3974_ldo5_data = {
243 .constraints = {
244 .name = "VTF_2.8V",
245 .min_uV = 2800000,
246 .max_uV = 2800000,
247 .apply_uV = 1,
248 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
249 .state_mem = {
250 .disabled = 1,
251 },
252 },
253 };
254
255 static struct regulator_init_data lp3974_ldo6_data = {
256 .constraints = {
257 .name = "LDO6",
258 .min_uV = 2000000,
259 .max_uV = 2000000,
260 .apply_uV = 1,
261 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
262 .state_mem = {
263 .disabled = 1,
264 },
265 },
266 };
267
268 static struct regulator_consumer_supply lp3974_ldo7_consumer[] = {
269 REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"),
270 };
271
272 static struct regulator_init_data lp3974_ldo7_data = {
273 .constraints = {
274 .name = "VLCD+VMIPI_1.8V",
275 .min_uV = 1800000,
276 .max_uV = 1800000,
277 .apply_uV = 1,
278 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
279 .state_mem = {
280 .disabled = 1,
281 },
282 },
283 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo7_consumer),
284 .consumer_supplies = lp3974_ldo7_consumer,
285 };
286
287 static struct regulator_consumer_supply lp3974_ldo8_consumer[] = {
288 REGULATOR_SUPPLY("vdd33a_dac", "s5p-sdo"),
289 };
290
291 static struct regulator_init_data lp3974_ldo8_data = {
292 .constraints = {
293 .name = "VUSB+VDAC_3.3V",
294 .min_uV = 3300000,
295 .max_uV = 3300000,
296 .apply_uV = 1,
297 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
298 .state_mem = {
299 .disabled = 1,
300 },
301 },
302 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo8_consumer),
303 .consumer_supplies = lp3974_ldo8_consumer,
304 };
305
306 static struct regulator_init_data lp3974_ldo9_data = {
307 .constraints = {
308 .name = "VCC_2.8V",
309 .min_uV = 2800000,
310 .max_uV = 2800000,
311 .apply_uV = 1,
312 .always_on = 1,
313 .state_mem = {
314 .enabled = 1,
315 },
316 },
317 };
318
319 static struct regulator_init_data lp3974_ldo10_data = {
320 .constraints = {
321 .name = "VPLL_1.1V",
322 .min_uV = 1100000,
323 .max_uV = 1100000,
324 .boot_on = 1,
325 .apply_uV = 1,
326 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
327 .state_mem = {
328 .disabled = 1,
329 },
330 },
331 };
332
333 static struct regulator_consumer_supply lp3974_ldo11_consumer =
334 REGULATOR_SUPPLY("dig_28", "0-001f");
335
336 static struct regulator_init_data lp3974_ldo11_data = {
337 .constraints = {
338 .name = "CAM_AF_3.3V",
339 .min_uV = 3300000,
340 .max_uV = 3300000,
341 .apply_uV = 1,
342 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
343 .state_mem = {
344 .disabled = 1,
345 },
346 },
347 .num_consumer_supplies = 1,
348 .consumer_supplies = &lp3974_ldo11_consumer,
349 };
350
351 static struct regulator_init_data lp3974_ldo12_data = {
352 .constraints = {
353 .name = "PS_2.8V",
354 .min_uV = 2800000,
355 .max_uV = 2800000,
356 .apply_uV = 1,
357 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
358 .state_mem = {
359 .disabled = 1,
360 },
361 },
362 };
363
364 static struct regulator_init_data lp3974_ldo13_data = {
365 .constraints = {
366 .name = "VHIC_1.2V",
367 .min_uV = 1200000,
368 .max_uV = 1200000,
369 .apply_uV = 1,
370 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
371 .state_mem = {
372 .disabled = 1,
373 },
374 },
375 };
376
377 static struct regulator_consumer_supply lp3974_ldo14_consumer =
378 REGULATOR_SUPPLY("dig_18", "0-001f");
379
380 static struct regulator_init_data lp3974_ldo14_data = {
381 .constraints = {
382 .name = "CAM_I_HOST_1.8V",
383 .min_uV = 1800000,
384 .max_uV = 1800000,
385 .apply_uV = 1,
386 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
387 .state_mem = {
388 .disabled = 1,
389 },
390 },
391 .num_consumer_supplies = 1,
392 .consumer_supplies = &lp3974_ldo14_consumer,
393 };
394
395
396 static struct regulator_consumer_supply lp3974_ldo15_consumer =
397 REGULATOR_SUPPLY("dig_12", "0-001f");
398
399 static struct regulator_init_data lp3974_ldo15_data = {
400 .constraints = {
401 .name = "CAM_S_DIG+FM33_CORE_1.2V",
402 .min_uV = 1200000,
403 .max_uV = 1200000,
404 .apply_uV = 1,
405 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
406 .state_mem = {
407 .disabled = 1,
408 },
409 },
410 .num_consumer_supplies = 1,
411 .consumer_supplies = &lp3974_ldo15_consumer,
412 };
413
414 static struct regulator_consumer_supply lp3974_ldo16_consumer[] = {
415 REGULATOR_SUPPLY("a_sensor", "0-001f"),
416 };
417
418 static struct regulator_init_data lp3974_ldo16_data = {
419 .constraints = {
420 .name = "CAM_S_ANA_2.8V",
421 .min_uV = 2800000,
422 .max_uV = 2800000,
423 .apply_uV = 1,
424 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
425 .state_mem = {
426 .disabled = 1,
427 },
428 },
429 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo16_consumer),
430 .consumer_supplies = lp3974_ldo16_consumer,
431 };
432
433 static struct regulator_init_data lp3974_ldo17_data = {
434 .constraints = {
435 .name = "VCC_3.0V_LCD",
436 .min_uV = 3000000,
437 .max_uV = 3000000,
438 .apply_uV = 1,
439 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
440 .boot_on = 1,
441 .state_mem = {
442 .disabled = 1,
443 },
444 },
445 };
446
447 static struct regulator_init_data lp3974_32khz_ap_data = {
448 .constraints = {
449 .name = "32KHz AP",
450 .always_on = 1,
451 .state_mem = {
452 .enabled = 1,
453 },
454 },
455 };
456
457 static struct regulator_init_data lp3974_32khz_cp_data = {
458 .constraints = {
459 .name = "32KHz CP",
460 .state_mem = {
461 .disabled = 1,
462 },
463 },
464 };
465
466 static struct regulator_init_data lp3974_vichg_data = {
467 .constraints = {
468 .name = "VICHG",
469 .state_mem = {
470 .disabled = 1,
471 },
472 },
473 };
474
475 static struct regulator_init_data lp3974_esafeout1_data = {
476 .constraints = {
477 .name = "SAFEOUT1",
478 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
479 .state_mem = {
480 .enabled = 1,
481 },
482 },
483 };
484
485 static struct regulator_init_data lp3974_esafeout2_data = {
486 .constraints = {
487 .name = "SAFEOUT2",
488 .boot_on = 1,
489 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
490 .state_mem = {
491 .enabled = 1,
492 },
493 },
494 };
495
496 static struct max8998_regulator_data lp3974_regulators[] = {
497 { MAX8998_LDO2, &lp3974_ldo2_data },
498 { MAX8998_LDO3, &lp3974_ldo3_data },
499 { MAX8998_LDO4, &lp3974_ldo4_data },
500 { MAX8998_LDO5, &lp3974_ldo5_data },
501 { MAX8998_LDO6, &lp3974_ldo6_data },
502 { MAX8998_LDO7, &lp3974_ldo7_data },
503 { MAX8998_LDO8, &lp3974_ldo8_data },
504 { MAX8998_LDO9, &lp3974_ldo9_data },
505 { MAX8998_LDO10, &lp3974_ldo10_data },
506 { MAX8998_LDO11, &lp3974_ldo11_data },
507 { MAX8998_LDO12, &lp3974_ldo12_data },
508 { MAX8998_LDO13, &lp3974_ldo13_data },
509 { MAX8998_LDO14, &lp3974_ldo14_data },
510 { MAX8998_LDO15, &lp3974_ldo15_data },
511 { MAX8998_LDO16, &lp3974_ldo16_data },
512 { MAX8998_LDO17, &lp3974_ldo17_data },
513 { MAX8998_BUCK1, &lp3974_buck1_data },
514 { MAX8998_BUCK2, &lp3974_buck2_data },
515 { MAX8998_BUCK3, &lp3974_buck3_data },
516 { MAX8998_BUCK4, &lp3974_buck4_data },
517 { MAX8998_EN32KHZ_AP, &lp3974_32khz_ap_data },
518 { MAX8998_EN32KHZ_CP, &lp3974_32khz_cp_data },
519 { MAX8998_ENVICHG, &lp3974_vichg_data },
520 { MAX8998_ESAFEOUT1, &lp3974_esafeout1_data },
521 { MAX8998_ESAFEOUT2, &lp3974_esafeout2_data },
522 };
523
524 static struct max8998_platform_data universal_lp3974_pdata = {
525 .num_regulators = ARRAY_SIZE(lp3974_regulators),
526 .regulators = lp3974_regulators,
527 .buck1_voltage1 = 1100000, /* INT */
528 .buck1_voltage2 = 1000000,
529 .buck1_voltage3 = 1100000,
530 .buck1_voltage4 = 1000000,
531 .buck1_set1 = EXYNOS4_GPX0(5),
532 .buck1_set2 = EXYNOS4_GPX0(6),
533 .buck2_voltage1 = 1200000, /* G3D */
534 .buck2_voltage2 = 1100000,
535 .buck1_default_idx = 0,
536 .buck2_set3 = EXYNOS4_GPE2(0),
537 .buck2_default_idx = 0,
538 .wakeup = true,
539 };
540
541
542 enum fixed_regulator_id {
543 FIXED_REG_ID_MMC0,
544 FIXED_REG_ID_HDMI_5V,
545 FIXED_REG_ID_CAM_S_IF,
546 FIXED_REG_ID_CAM_I_CORE,
547 FIXED_REG_ID_CAM_VT_DIO,
548 };
549
550 static struct regulator_consumer_supply hdmi_fixed_consumer =
551 REGULATOR_SUPPLY("hdmi-en", "exynos4-hdmi");
552
553 static struct regulator_init_data hdmi_fixed_voltage_init_data = {
554 .constraints = {
555 .name = "HDMI_5V",
556 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
557 },
558 .num_consumer_supplies = 1,
559 .consumer_supplies = &hdmi_fixed_consumer,
560 };
561
562 static struct fixed_voltage_config hdmi_fixed_voltage_config = {
563 .supply_name = "HDMI_EN1",
564 .microvolts = 5000000,
565 .gpio = EXYNOS4_GPE0(1),
566 .enable_high = true,
567 .init_data = &hdmi_fixed_voltage_init_data,
568 };
569
570 static struct platform_device hdmi_fixed_voltage = {
571 .name = "reg-fixed-voltage",
572 .id = FIXED_REG_ID_HDMI_5V,
573 .dev = {
574 .platform_data = &hdmi_fixed_voltage_config,
575 },
576 };
577
578 /* GPIO I2C 5 (PMIC) */
579 static struct i2c_board_info i2c5_devs[] __initdata = {
580 {
581 I2C_BOARD_INFO("max8952", 0xC0 >> 1),
582 .platform_data = &universal_max8952_pdata,
583 }, {
584 I2C_BOARD_INFO("lp3974", 0xCC >> 1),
585 .platform_data = &universal_lp3974_pdata,
586 },
587 };
588
589 /* I2C3 (TSP) */
590 static struct mxt_platform_data qt602240_platform_data = {
591 .x_line = 19,
592 .y_line = 11,
593 .x_size = 800,
594 .y_size = 480,
595 .blen = 0x11,
596 .threshold = 0x28,
597 .voltage = 2800000, /* 2.8V */
598 .orient = MXT_DIAGONAL,
599 .irqflags = IRQF_TRIGGER_FALLING,
600 };
601
602 static struct i2c_board_info i2c3_devs[] __initdata = {
603 {
604 I2C_BOARD_INFO("qt602240_ts", 0x4a),
605 .platform_data = &qt602240_platform_data,
606 },
607 };
608
609 static void __init universal_tsp_init(void)
610 {
611 int gpio;
612
613 /* TSP_LDO_ON: XMDMADDR_11 */
614 gpio = EXYNOS4_GPE2(3);
615 gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "TSP_LDO_ON");
616 gpio_export(gpio, 0);
617
618 /* TSP_INT: XMDMADDR_7 */
619 gpio = EXYNOS4_GPE1(7);
620 gpio_request(gpio, "TSP_INT");
621
622 s5p_register_gpio_interrupt(gpio);
623 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
624 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
625 i2c3_devs[0].irq = gpio_to_irq(gpio);
626 }
627
628
629 /* GPIO I2C 12 (3 Touchkey) */
630 static uint32_t touchkey_keymap[] = {
631 /* MCS_KEY_MAP(value, keycode) */
632 MCS_KEY_MAP(0, KEY_MENU), /* KEY_SEND */
633 MCS_KEY_MAP(1, KEY_BACK), /* KEY_END */
634 };
635
636 static struct mcs_platform_data touchkey_data = {
637 .keymap = touchkey_keymap,
638 .keymap_size = ARRAY_SIZE(touchkey_keymap),
639 .key_maxval = 2,
640 };
641
642 /* GPIO I2C 3_TOUCH 2.8V */
643 #define I2C_GPIO_BUS_12 12
644 static struct i2c_gpio_platform_data i2c_gpio12_data = {
645 .sda_pin = EXYNOS4_GPE4(0), /* XMDMDATA_8 */
646 .scl_pin = EXYNOS4_GPE4(1), /* XMDMDATA_9 */
647 };
648
649 static struct platform_device i2c_gpio12 = {
650 .name = "i2c-gpio",
651 .id = I2C_GPIO_BUS_12,
652 .dev = {
653 .platform_data = &i2c_gpio12_data,
654 },
655 };
656
657 static struct i2c_board_info i2c_gpio12_devs[] __initdata = {
658 {
659 I2C_BOARD_INFO("mcs5080_touchkey", 0x20),
660 .platform_data = &touchkey_data,
661 },
662 };
663
664 static void __init universal_touchkey_init(void)
665 {
666 int gpio;
667
668 gpio = EXYNOS4_GPE3(7); /* XMDMDATA_7 */
669 gpio_request(gpio, "3_TOUCH_INT");
670 s5p_register_gpio_interrupt(gpio);
671 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
672 i2c_gpio12_devs[0].irq = gpio_to_irq(gpio);
673
674 gpio = EXYNOS4_GPE3(3); /* XMDMDATA_3 */
675 gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "3_TOUCH_EN");
676 }
677
678 static struct s3c2410_platform_i2c universal_i2c0_platdata __initdata = {
679 .frequency = 300 * 1000,
680 .sda_delay = 200,
681 };
682
683 /* GPIO KEYS */
684 static struct gpio_keys_button universal_gpio_keys_tables[] = {
685 {
686 .code = KEY_VOLUMEUP,
687 .gpio = EXYNOS4_GPX2(0), /* XEINT16 */
688 .desc = "gpio-keys: KEY_VOLUMEUP",
689 .type = EV_KEY,
690 .active_low = 1,
691 .debounce_interval = 1,
692 }, {
693 .code = KEY_VOLUMEDOWN,
694 .gpio = EXYNOS4_GPX2(1), /* XEINT17 */
695 .desc = "gpio-keys: KEY_VOLUMEDOWN",
696 .type = EV_KEY,
697 .active_low = 1,
698 .debounce_interval = 1,
699 }, {
700 .code = KEY_CONFIG,
701 .gpio = EXYNOS4_GPX2(2), /* XEINT18 */
702 .desc = "gpio-keys: KEY_CONFIG",
703 .type = EV_KEY,
704 .active_low = 1,
705 .debounce_interval = 1,
706 }, {
707 .code = KEY_CAMERA,
708 .gpio = EXYNOS4_GPX2(3), /* XEINT19 */
709 .desc = "gpio-keys: KEY_CAMERA",
710 .type = EV_KEY,
711 .active_low = 1,
712 .debounce_interval = 1,
713 }, {
714 .code = KEY_OK,
715 .gpio = EXYNOS4_GPX3(5), /* XEINT29 */
716 .desc = "gpio-keys: KEY_OK",
717 .type = EV_KEY,
718 .active_low = 1,
719 .debounce_interval = 1,
720 },
721 };
722
723 static struct gpio_keys_platform_data universal_gpio_keys_data = {
724 .buttons = universal_gpio_keys_tables,
725 .nbuttons = ARRAY_SIZE(universal_gpio_keys_tables),
726 };
727
728 static struct platform_device universal_gpio_keys = {
729 .name = "gpio-keys",
730 .dev = {
731 .platform_data = &universal_gpio_keys_data,
732 },
733 };
734
735 /* eMMC */
736 static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = {
737 .max_width = 8,
738 .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
739 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
740 MMC_CAP_DISABLE),
741 .cd_type = S3C_SDHCI_CD_PERMANENT,
742 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
743 };
744
745 static struct regulator_consumer_supply mmc0_supplies[] = {
746 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
747 };
748
749 static struct regulator_init_data mmc0_fixed_voltage_init_data = {
750 .constraints = {
751 .name = "VMEM_VDD_2.8V",
752 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
753 },
754 .num_consumer_supplies = ARRAY_SIZE(mmc0_supplies),
755 .consumer_supplies = mmc0_supplies,
756 };
757
758 static struct fixed_voltage_config mmc0_fixed_voltage_config = {
759 .supply_name = "MASSMEMORY_EN",
760 .microvolts = 2800000,
761 .gpio = EXYNOS4_GPE1(3),
762 .enable_high = true,
763 .init_data = &mmc0_fixed_voltage_init_data,
764 };
765
766 static struct platform_device mmc0_fixed_voltage = {
767 .name = "reg-fixed-voltage",
768 .id = FIXED_REG_ID_MMC0,
769 .dev = {
770 .platform_data = &mmc0_fixed_voltage_config,
771 },
772 };
773
774 /* SD */
775 static struct s3c_sdhci_platdata universal_hsmmc2_data __initdata = {
776 .max_width = 4,
777 .host_caps = MMC_CAP_4_BIT_DATA |
778 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
779 MMC_CAP_DISABLE,
780 .ext_cd_gpio = EXYNOS4_GPX3(4), /* XEINT_28 */
781 .ext_cd_gpio_invert = 1,
782 .cd_type = S3C_SDHCI_CD_GPIO,
783 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
784 };
785
786 /* WiFi */
787 static struct s3c_sdhci_platdata universal_hsmmc3_data __initdata = {
788 .max_width = 4,
789 .host_caps = MMC_CAP_4_BIT_DATA |
790 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
791 MMC_CAP_DISABLE,
792 .cd_type = S3C_SDHCI_CD_EXTERNAL,
793 };
794
795 static void __init universal_sdhci_init(void)
796 {
797 s3c_sdhci0_set_platdata(&universal_hsmmc0_data);
798 s3c_sdhci2_set_platdata(&universal_hsmmc2_data);
799 s3c_sdhci3_set_platdata(&universal_hsmmc3_data);
800 }
801
802 /* I2C1 */
803 static struct i2c_board_info i2c1_devs[] __initdata = {
804 /* Gyro, To be updated */
805 };
806
807 /* Frame Buffer */
808 static struct s3c_fb_pd_win universal_fb_win0 = {
809 .win_mode = {
810 .left_margin = 16,
811 .right_margin = 16,
812 .upper_margin = 2,
813 .lower_margin = 28,
814 .hsync_len = 2,
815 .vsync_len = 1,
816 .xres = 480,
817 .yres = 800,
818 .refresh = 55,
819 },
820 .max_bpp = 32,
821 .default_bpp = 16,
822 };
823
824 static struct s3c_fb_platdata universal_lcd_pdata __initdata = {
825 .win[0] = &universal_fb_win0,
826 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
827 VIDCON0_CLKSEL_LCD,
828 .vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN
829 | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
830 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
831 };
832
833 static struct regulator_consumer_supply cam_i_core_supply =
834 REGULATOR_SUPPLY("core", "0-001f");
835
836 static struct regulator_init_data cam_i_core_reg_init_data = {
837 .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
838 .num_consumer_supplies = 1,
839 .consumer_supplies = &cam_i_core_supply,
840 };
841
842 static struct fixed_voltage_config cam_i_core_fixed_voltage_cfg = {
843 .supply_name = "CAM_I_CORE_1.2V",
844 .microvolts = 1200000,
845 .gpio = EXYNOS4_GPE2(2), /* CAM_8M_CORE_EN */
846 .enable_high = 1,
847 .init_data = &cam_i_core_reg_init_data,
848 };
849
850 static struct platform_device cam_i_core_fixed_reg_dev = {
851 .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_I_CORE,
852 .dev = { .platform_data = &cam_i_core_fixed_voltage_cfg },
853 };
854
855 static struct regulator_consumer_supply cam_s_if_supply =
856 REGULATOR_SUPPLY("d_sensor", "0-001f");
857
858 static struct regulator_init_data cam_s_if_reg_init_data = {
859 .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
860 .num_consumer_supplies = 1,
861 .consumer_supplies = &cam_s_if_supply,
862 };
863
864 static struct fixed_voltage_config cam_s_if_fixed_voltage_cfg = {
865 .supply_name = "CAM_S_IF_1.8V",
866 .microvolts = 1800000,
867 .gpio = EXYNOS4_GPE3(0), /* CAM_PWR_EN1 */
868 .enable_high = 1,
869 .init_data = &cam_s_if_reg_init_data,
870 };
871
872 static struct platform_device cam_s_if_fixed_reg_dev = {
873 .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_S_IF,
874 .dev = { .platform_data = &cam_s_if_fixed_voltage_cfg },
875 };
876
877 static struct s5p_platform_mipi_csis mipi_csis_platdata = {
878 .clk_rate = 166000000UL,
879 .lanes = 2,
880 .alignment = 32,
881 .hs_settle = 12,
882 .phy_enable = s5p_csis_phy_enable,
883 };
884
885 #define GPIO_CAM_LEVEL_EN(n) EXYNOS4_GPE4(n + 3)
886 #define GPIO_CAM_8M_ISP_INT EXYNOS4_GPX1(5) /* XEINT_13 */
887 #define GPIO_CAM_MEGA_nRST EXYNOS4_GPE2(5)
888
889 static int m5mols_set_power(struct device *dev, int on)
890 {
891 gpio_set_value(GPIO_CAM_LEVEL_EN(1), !on);
892 gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on);
893 return 0;
894 }
895
896 static struct m5mols_platform_data m5mols_platdata = {
897 .gpio_reset = GPIO_CAM_MEGA_nRST,
898 .reset_polarity = 0,
899 .set_power = m5mols_set_power,
900 };
901
902 static struct i2c_board_info m5mols_board_info = {
903 I2C_BOARD_INFO("M5MOLS", 0x1F),
904 .platform_data = &m5mols_platdata,
905 };
906
907 static struct s5p_fimc_isp_info universal_camera_sensors[] = {
908 {
909 .mux_id = 0,
910 .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING |
911 V4L2_MBUS_VSYNC_ACTIVE_LOW,
912 .bus_type = FIMC_MIPI_CSI2,
913 .board_info = &m5mols_board_info,
914 .i2c_bus_num = 0,
915 .clk_frequency = 24000000UL,
916 .csi_data_align = 32,
917 },
918 };
919
920 static struct s5p_platform_fimc fimc_md_platdata = {
921 .isp_info = universal_camera_sensors,
922 .num_clients = ARRAY_SIZE(universal_camera_sensors),
923 };
924
925 static struct gpio universal_camera_gpios[] = {
926 { GPIO_CAM_LEVEL_EN(1), GPIOF_OUT_INIT_HIGH, "CAM_LVL_EN1" },
927 { GPIO_CAM_LEVEL_EN(2), GPIOF_OUT_INIT_LOW, "CAM_LVL_EN2" },
928 { GPIO_CAM_8M_ISP_INT, GPIOF_IN, "8M_ISP_INT" },
929 { GPIO_CAM_MEGA_nRST, GPIOF_OUT_INIT_LOW, "CAM_8M_NRST" },
930 };
931
932 static void universal_camera_init(void)
933 {
934 s3c_set_platdata(&mipi_csis_platdata, sizeof(mipi_csis_platdata),
935 &s5p_device_mipi_csis0);
936 s3c_set_platdata(&fimc_md_platdata, sizeof(fimc_md_platdata),
937 &s5p_device_fimc_md);
938
939 if (gpio_request_array(universal_camera_gpios,
940 ARRAY_SIZE(universal_camera_gpios))) {
941 pr_err("%s: GPIO request failed\n", __func__);
942 return;
943 }
944
945 if (!s3c_gpio_cfgpin(GPIO_CAM_8M_ISP_INT, S3C_GPIO_SFN(0xf)))
946 m5mols_board_info.irq = gpio_to_irq(GPIO_CAM_8M_ISP_INT);
947 else
948 pr_err("Failed to configure 8M_ISP_INT GPIO\n");
949
950 /* Free GPIOs controlled directly by the sensor drivers. */
951 gpio_free(GPIO_CAM_MEGA_nRST);
952 gpio_free(GPIO_CAM_8M_ISP_INT);
953
954 if (exynos4_fimc_setup_gpio(S5P_CAMPORT_A))
955 pr_err("Camera port A setup failed\n");
956 }
957
958 static struct platform_device *universal_devices[] __initdata = {
959 /* Samsung Platform Devices */
960 &s5p_device_mipi_csis0,
961 &s5p_device_fimc0,
962 &s5p_device_fimc1,
963 &s5p_device_fimc2,
964 &s5p_device_fimc3,
965 &mmc0_fixed_voltage,
966 &s3c_device_hsmmc0,
967 &s3c_device_hsmmc2,
968 &s3c_device_hsmmc3,
969 &s3c_device_i2c0,
970 &s3c_device_i2c3,
971 &s3c_device_i2c5,
972 &s5p_device_i2c_hdmiphy,
973 &hdmi_fixed_voltage,
974 &exynos4_device_pd[PD_TV],
975 &s5p_device_hdmi,
976 &s5p_device_sdo,
977 &s5p_device_mixer,
978
979 /* Universal Devices */
980 &i2c_gpio12,
981 &universal_gpio_keys,
982 &s5p_device_onenand,
983 &s5p_device_fimd0,
984 &s5p_device_mfc,
985 &s5p_device_mfc_l,
986 &s5p_device_mfc_r,
987 &exynos4_device_pd[PD_MFC],
988 &exynos4_device_pd[PD_LCD0],
989 &exynos4_device_pd[PD_CAM],
990 &cam_i_core_fixed_reg_dev,
991 &cam_s_if_fixed_reg_dev,
992 &s5p_device_fimc_md,
993 };
994
995 static void __init universal_map_io(void)
996 {
997 exynos_init_io(NULL, 0);
998 s3c24xx_init_clocks(24000000);
999 s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
1000 }
1001
1002 void s5p_tv_setup(void)
1003 {
1004 /* direct HPD to HDMI chip */
1005 gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug");
1006 s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
1007 s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
1008
1009 /* setup dependencies between TV devices */
1010 s5p_device_hdmi.dev.parent = &exynos4_device_pd[PD_TV].dev;
1011 s5p_device_mixer.dev.parent = &exynos4_device_pd[PD_TV].dev;
1012 }
1013
1014 static void __init universal_reserve(void)
1015 {
1016 s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
1017 }
1018
1019 static void __init universal_machine_init(void)
1020 {
1021 universal_sdhci_init();
1022 s5p_tv_setup();
1023
1024 s3c_i2c0_set_platdata(&universal_i2c0_platdata);
1025 i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs));
1026
1027 universal_tsp_init();
1028 s3c_i2c3_set_platdata(NULL);
1029 i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs));
1030
1031 s3c_i2c5_set_platdata(NULL);
1032 s5p_i2c_hdmiphy_set_platdata(NULL);
1033 i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs));
1034
1035 s5p_fimd0_set_platdata(&universal_lcd_pdata);
1036
1037 universal_touchkey_init();
1038 i2c_register_board_info(I2C_GPIO_BUS_12, i2c_gpio12_devs,
1039 ARRAY_SIZE(i2c_gpio12_devs));
1040
1041 universal_camera_init();
1042
1043 /* Last */
1044 platform_add_devices(universal_devices, ARRAY_SIZE(universal_devices));
1045
1046 s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev;
1047 s5p_device_fimd0.dev.parent = &exynos4_device_pd[PD_LCD0].dev;
1048
1049 s5p_device_fimc0.dev.parent = &exynos4_device_pd[PD_CAM].dev;
1050 s5p_device_fimc1.dev.parent = &exynos4_device_pd[PD_CAM].dev;
1051 s5p_device_fimc2.dev.parent = &exynos4_device_pd[PD_CAM].dev;
1052 s5p_device_fimc3.dev.parent = &exynos4_device_pd[PD_CAM].dev;
1053 s5p_device_mipi_csis0.dev.parent = &exynos4_device_pd[PD_CAM].dev;
1054 }
1055
1056 MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
1057 /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */
1058 .atag_offset = 0x100,
1059 .init_irq = exynos4_init_irq,
1060 .map_io = universal_map_io,
1061 .handle_irq = gic_handle_irq,
1062 .init_machine = universal_machine_init,
1063 .timer = &exynos4_timer,
1064 .reserve = &universal_reserve,
1065 .restart = exynos4_restart,
1066 MACHINE_END