spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / arm / mach-iop32x / include / mach / iq31244.h
blob6b6b369e781c5488f6427db0f93d3f96058d2c5f
1 /*
2 * arch/arm/mach-iop32x/include/mach/iq31244.h
4 * Intel IQ31244 evaluation board registers
5 */
7 #ifndef __IQ31244_H
8 #define __IQ31244_H
10 #define IQ31244_UART 0xfe800000 /* UART #1 */
11 #define IQ31244_7SEG_1 0xfe840000 /* 7-Segment MSB */
12 #define IQ31244_7SEG_0 0xfe850000 /* 7-Segment LSB (WO) */
13 #define IQ31244_ROTARY_SW 0xfe8d0000 /* Rotary Switch */
14 #define IQ31244_BATT_STAT 0xfe8f0000 /* Battery Status */
17 #endif