arch/arm/mach-lpc32xx/include/mach/gpio-lpc32xx.h

   1 /*
   2  * Author: Kevin Wells <kevin.wells@nxp.com>
   3  *
   4  * Copyright (C) 2010 NXP Semiconductors
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  */
  16
  17 #ifndef __MACH_GPIO_LPC32XX_H
  18 #define __MACH_GPIO_LPC32XX_H
  19
  20 /*
  21  * Note!
  22  * Muxed GP pins need to be setup to the GP state in the board level
  23  * code prior to using this driver.
  24  * GPI pins : 28xP3 group
  25  * GPO pins : 24xP3 group
  26  * GPIO pins: 8xP0 group, 24xP1 group, 13xP2 group, 6xP3 group
  27  */
  28
  29 #define LPC32XX_GPIO_P0_MAX 8
  30 #define LPC32XX_GPIO_P1_MAX 24
  31 #define LPC32XX_GPIO_P2_MAX 13
  32 #define LPC32XX_GPIO_P3_MAX 6
  33 #define LPC32XX_GPI_P3_MAX 28
  34 #define LPC32XX_GPO_P3_MAX 24
  35
  36 #define LPC32XX_GPIO_P0_GRP 0
  37 #define LPC32XX_GPIO_P1_GRP (LPC32XX_GPIO_P0_GRP + LPC32XX_GPIO_P0_MAX)
  38 #define LPC32XX_GPIO_P2_GRP (LPC32XX_GPIO_P1_GRP + LPC32XX_GPIO_P1_MAX)
  39 #define LPC32XX_GPIO_P3_GRP (LPC32XX_GPIO_P2_GRP + LPC32XX_GPIO_P2_MAX)
  40 #define LPC32XX_GPI_P3_GRP (LPC32XX_GPIO_P3_GRP + LPC32XX_GPIO_P3_MAX)
  41 #define LPC32XX_GPO_P3_GRP (LPC32XX_GPI_P3_GRP + LPC32XX_GPI_P3_MAX)
  42
  43 /*
  44  * A specific GPIO can be selected with this macro
  45  * ie, GPIO_05 can be selected with LPC32XX_GPIO(LPC32XX_GPIO_P3_GRP, 5)
  46  * See the LPC32x0 User's guide for GPIO group numbers
  47  */
  48 #define LPC32XX_GPIO(x, y) ((x) + (y))
  49
  50 #endif /* __MACH_GPIO_LPC32XX_H */