spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / arm / mach-omap1 / gpio16xx.c
blob0f399bd0e70e7be70ee1eebc2603f8f877c63f4f
1 /*
2 * OMAP16xx specific gpio init
4 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
6 * Author:
7 * Charulatha V <charu@ti.com>
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation version 2.
13 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
14 * kind, whether express or implied; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
19 #include <linux/gpio.h>
21 #define OMAP1610_GPIO1_BASE 0xfffbe400
22 #define OMAP1610_GPIO2_BASE 0xfffbec00
23 #define OMAP1610_GPIO3_BASE 0xfffbb400
24 #define OMAP1610_GPIO4_BASE 0xfffbbc00
25 #define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE
27 /* mpu gpio */
28 static struct __initdata resource omap16xx_mpu_gpio_resources[] = {
30 .start = OMAP1_MPUIO_VBASE,
31 .end = OMAP1_MPUIO_VBASE + SZ_2K - 1,
32 .flags = IORESOURCE_MEM,
35 .start = INT_MPUIO,
36 .flags = IORESOURCE_IRQ,
40 static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
41 .revision = USHRT_MAX,
42 .direction = OMAP_MPUIO_IO_CNTL,
43 .datain = OMAP_MPUIO_INPUT_LATCH,
44 .dataout = OMAP_MPUIO_OUTPUT,
45 .irqstatus = OMAP_MPUIO_GPIO_INT,
46 .irqenable = OMAP_MPUIO_GPIO_MASKIT,
47 .irqenable_inv = true,
50 static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
51 .virtual_irq_start = IH_MPUIO_BASE,
52 .bank_type = METHOD_MPUIO,
53 .bank_width = 16,
54 .bank_stride = 1,
55 .regs = &omap16xx_mpuio_regs,
58 static struct platform_device omap16xx_mpu_gpio = {
59 .name = "omap_gpio",
60 .id = 0,
61 .dev = {
62 .platform_data = &omap16xx_mpu_gpio_config,
64 .num_resources = ARRAY_SIZE(omap16xx_mpu_gpio_resources),
65 .resource = omap16xx_mpu_gpio_resources,
68 /* gpio1 */
69 static struct __initdata resource omap16xx_gpio1_resources[] = {
71 .start = OMAP1610_GPIO1_BASE,
72 .end = OMAP1610_GPIO1_BASE + SZ_2K - 1,
73 .flags = IORESOURCE_MEM,
76 .start = INT_GPIO_BANK1,
77 .flags = IORESOURCE_IRQ,
81 static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
82 .revision = OMAP1610_GPIO_REVISION,
83 .direction = OMAP1610_GPIO_DIRECTION,
84 .set_dataout = OMAP1610_GPIO_SET_DATAOUT,
85 .clr_dataout = OMAP1610_GPIO_CLEAR_DATAOUT,
86 .datain = OMAP1610_GPIO_DATAIN,
87 .dataout = OMAP1610_GPIO_DATAOUT,
88 .irqstatus = OMAP1610_GPIO_IRQSTATUS1,
89 .irqenable = OMAP1610_GPIO_IRQENABLE1,
90 .set_irqenable = OMAP1610_GPIO_SET_IRQENABLE1,
91 .clr_irqenable = OMAP1610_GPIO_CLEAR_IRQENABLE1,
94 static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
95 .virtual_irq_start = IH_GPIO_BASE,
96 .bank_type = METHOD_GPIO_1610,
97 .bank_width = 16,
98 .regs = &omap16xx_gpio_regs,
101 static struct platform_device omap16xx_gpio1 = {
102 .name = "omap_gpio",
103 .id = 1,
104 .dev = {
105 .platform_data = &omap16xx_gpio1_config,
107 .num_resources = ARRAY_SIZE(omap16xx_gpio1_resources),
108 .resource = omap16xx_gpio1_resources,
111 /* gpio2 */
112 static struct __initdata resource omap16xx_gpio2_resources[] = {
114 .start = OMAP1610_GPIO2_BASE,
115 .end = OMAP1610_GPIO2_BASE + SZ_2K - 1,
116 .flags = IORESOURCE_MEM,
119 .start = INT_1610_GPIO_BANK2,
120 .flags = IORESOURCE_IRQ,
124 static struct __initdata omap_gpio_platform_data omap16xx_gpio2_config = {
125 .virtual_irq_start = IH_GPIO_BASE + 16,
126 .bank_type = METHOD_GPIO_1610,
127 .bank_width = 16,
128 .regs = &omap16xx_gpio_regs,
131 static struct platform_device omap16xx_gpio2 = {
132 .name = "omap_gpio",
133 .id = 2,
134 .dev = {
135 .platform_data = &omap16xx_gpio2_config,
137 .num_resources = ARRAY_SIZE(omap16xx_gpio2_resources),
138 .resource = omap16xx_gpio2_resources,
141 /* gpio3 */
142 static struct __initdata resource omap16xx_gpio3_resources[] = {
144 .start = OMAP1610_GPIO3_BASE,
145 .end = OMAP1610_GPIO3_BASE + SZ_2K - 1,
146 .flags = IORESOURCE_MEM,
149 .start = INT_1610_GPIO_BANK3,
150 .flags = IORESOURCE_IRQ,
154 static struct __initdata omap_gpio_platform_data omap16xx_gpio3_config = {
155 .virtual_irq_start = IH_GPIO_BASE + 32,
156 .bank_type = METHOD_GPIO_1610,
157 .bank_width = 16,
158 .regs = &omap16xx_gpio_regs,
161 static struct platform_device omap16xx_gpio3 = {
162 .name = "omap_gpio",
163 .id = 3,
164 .dev = {
165 .platform_data = &omap16xx_gpio3_config,
167 .num_resources = ARRAY_SIZE(omap16xx_gpio3_resources),
168 .resource = omap16xx_gpio3_resources,
171 /* gpio4 */
172 static struct __initdata resource omap16xx_gpio4_resources[] = {
174 .start = OMAP1610_GPIO4_BASE,
175 .end = OMAP1610_GPIO4_BASE + SZ_2K - 1,
176 .flags = IORESOURCE_MEM,
179 .start = INT_1610_GPIO_BANK4,
180 .flags = IORESOURCE_IRQ,
184 static struct __initdata omap_gpio_platform_data omap16xx_gpio4_config = {
185 .virtual_irq_start = IH_GPIO_BASE + 48,
186 .bank_type = METHOD_GPIO_1610,
187 .bank_width = 16,
188 .regs = &omap16xx_gpio_regs,
191 static struct platform_device omap16xx_gpio4 = {
192 .name = "omap_gpio",
193 .id = 4,
194 .dev = {
195 .platform_data = &omap16xx_gpio4_config,
197 .num_resources = ARRAY_SIZE(omap16xx_gpio4_resources),
198 .resource = omap16xx_gpio4_resources,
201 static struct __initdata platform_device * omap16xx_gpio_dev[] = {
202 &omap16xx_mpu_gpio,
203 &omap16xx_gpio1,
204 &omap16xx_gpio2,
205 &omap16xx_gpio3,
206 &omap16xx_gpio4,
210 * omap16xx_gpio_init needs to be done before
211 * machine_init functions access gpio APIs.
212 * Hence omap16xx_gpio_init is a postcore_initcall.
214 static int __init omap16xx_gpio_init(void)
216 int i;
218 if (!cpu_is_omap16xx())
219 return -EINVAL;
221 for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++)
222 platform_device_register(omap16xx_gpio_dev[i]);
224 gpio_bank_count = ARRAY_SIZE(omap16xx_gpio_dev);
226 return 0;
228 postcore_initcall(omap16xx_gpio_init);