spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / arm / mach-omap2 / sr_device.c
blob9f43fcc05d3e5825b78e194e1929dd2d85c8799b
1 /*
2 * OMAP3/OMAP4 smartreflex device file
4 * Author: Thara Gopinath <thara@ti.com>
6 * Based originally on code from smartreflex.c
7 * Copyright (C) 2010 Texas Instruments, Inc.
8 * Thara Gopinath <thara@ti.com>
10 * Copyright (C) 2008 Nokia Corporation
11 * Kalle Jokiniemi
13 * Copyright (C) 2007 Texas Instruments, Inc.
14 * Lesly A M <x0080970@ti.com>
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License version 2 as
18 * published by the Free Software Foundation.
21 #include <linux/err.h>
22 #include <linux/slab.h>
23 #include <linux/io.h>
25 #include <plat/omap_device.h>
27 #include "smartreflex.h"
28 #include "voltage.h"
29 #include "control.h"
30 #include "pm.h"
32 static bool sr_enable_on_init;
34 /* Read EFUSE values from control registers for OMAP3430 */
35 static void __init sr_set_nvalues(struct omap_volt_data *volt_data,
36 struct omap_sr_data *sr_data)
38 struct omap_sr_nvalue_table *nvalue_table;
39 int i, count = 0;
41 while (volt_data[count].volt_nominal)
42 count++;
44 nvalue_table = kzalloc(sizeof(struct omap_sr_nvalue_table)*count,
45 GFP_KERNEL);
47 for (i = 0; i < count; i++) {
48 u32 v;
50 * In OMAP4 the efuse registers are 24 bit aligned.
51 * A __raw_readl will fail for non-32 bit aligned address
52 * and hence the 8-bit read and shift.
54 if (cpu_is_omap44xx()) {
55 u16 offset = volt_data[i].sr_efuse_offs;
57 v = omap_ctrl_readb(offset) |
58 omap_ctrl_readb(offset + 1) << 8 |
59 omap_ctrl_readb(offset + 2) << 16;
60 } else {
61 v = omap_ctrl_readl(volt_data[i].sr_efuse_offs);
64 nvalue_table[i].efuse_offs = volt_data[i].sr_efuse_offs;
65 nvalue_table[i].nvalue = v;
68 sr_data->nvalue_table = nvalue_table;
69 sr_data->nvalue_count = count;
72 static int sr_dev_init(struct omap_hwmod *oh, void *user)
74 struct omap_sr_data *sr_data;
75 struct platform_device *pdev;
76 struct omap_volt_data *volt_data;
77 char *name = "smartreflex";
78 static int i;
80 sr_data = kzalloc(sizeof(struct omap_sr_data), GFP_KERNEL);
81 if (!sr_data) {
82 pr_err("%s: Unable to allocate memory for %s sr_data.Error!\n",
83 __func__, oh->name);
84 return -ENOMEM;
87 if (!oh->vdd_name) {
88 pr_err("%s: No voltage domain specified for %s."
89 "Cannot initialize\n", __func__, oh->name);
90 goto exit;
93 sr_data->ip_type = oh->class->rev;
94 sr_data->senn_mod = 0x1;
95 sr_data->senp_mod = 0x1;
97 sr_data->voltdm = voltdm_lookup(oh->vdd_name);
98 if (IS_ERR(sr_data->voltdm)) {
99 pr_err("%s: Unable to get voltage domain pointer for VDD %s\n",
100 __func__, oh->vdd_name);
101 goto exit;
104 omap_voltage_get_volttable(sr_data->voltdm, &volt_data);
105 if (!volt_data) {
106 pr_warning("%s: No Voltage table registerd fo VDD%d."
107 "Something really wrong\n\n", __func__, i + 1);
108 goto exit;
111 sr_set_nvalues(volt_data, sr_data);
113 sr_data->enable_on_init = sr_enable_on_init;
115 pdev = omap_device_build(name, i, oh, sr_data, sizeof(*sr_data),
116 NULL, 0, 0);
117 if (IS_ERR(pdev))
118 pr_warning("%s: Could not build omap_device for %s: %s.\n\n",
119 __func__, name, oh->name);
120 exit:
121 i++;
122 kfree(sr_data);
123 return 0;
127 * API to be called from board files to enable smartreflex
128 * autocompensation at init.
130 void __init omap_enable_smartreflex_on_init(void)
132 sr_enable_on_init = true;
135 int __init omap_devinit_smartreflex(void)
137 return omap_hwmod_for_each_by_class("smartreflex", sr_dev_init, NULL);