spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / arm / mach-omap2 / usb-host.c
blobf51348dafafdfb8ec85f48af6740fef8629f42b4
1 /*
2 * usb-host.c - OMAP USB Host
4 * This file will contain the board specific details for the
5 * Synopsys EHCI/OHCI host controller on OMAP3430 and onwards
7 * Copyright (C) 2007-2011 Texas Instruments
8 * Author: Vikram Pandita <vikram.pandita@ti.com>
9 * Author: Keshava Munegowda <keshava_mgowda@ti.com>
11 * Generalization by:
12 * Felipe Balbi <balbi@ti.com>
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
19 #include <linux/types.h>
20 #include <linux/errno.h>
21 #include <linux/delay.h>
22 #include <linux/platform_device.h>
23 #include <linux/slab.h>
24 #include <linux/dma-mapping.h>
26 #include <asm/io.h>
28 #include <mach/hardware.h>
29 #include <mach/irqs.h>
30 #include <plat/usb.h>
31 #include <plat/omap_device.h>
33 #include "mux.h"
35 #ifdef CONFIG_MFD_OMAP_USB_HOST
37 #define OMAP_USBHS_DEVICE "usbhs_omap"
38 #define USBHS_UHH_HWMODNAME "usb_host_hs"
39 #define USBHS_TLL_HWMODNAME "usb_tll_hs"
41 static struct usbhs_omap_platform_data usbhs_data;
42 static struct ehci_hcd_omap_platform_data ehci_data;
43 static struct ohci_hcd_omap_platform_data ohci_data;
45 static struct omap_device_pm_latency omap_uhhtll_latency[] = {
47 .deactivate_func = omap_device_idle_hwmods,
48 .activate_func = omap_device_enable_hwmods,
49 .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
53 /* MUX settings for EHCI pins */
55 * setup_ehci_io_mux - initialize IO pad mux for USBHOST
57 static void setup_ehci_io_mux(const enum usbhs_omap_port_mode *port_mode)
59 switch (port_mode[0]) {
60 case OMAP_EHCI_PORT_MODE_PHY:
61 omap_mux_init_signal("hsusb1_stp", OMAP_PIN_OUTPUT);
62 omap_mux_init_signal("hsusb1_clk", OMAP_PIN_OUTPUT);
63 omap_mux_init_signal("hsusb1_dir", OMAP_PIN_INPUT_PULLDOWN);
64 omap_mux_init_signal("hsusb1_nxt", OMAP_PIN_INPUT_PULLDOWN);
65 omap_mux_init_signal("hsusb1_data0", OMAP_PIN_INPUT_PULLDOWN);
66 omap_mux_init_signal("hsusb1_data1", OMAP_PIN_INPUT_PULLDOWN);
67 omap_mux_init_signal("hsusb1_data2", OMAP_PIN_INPUT_PULLDOWN);
68 omap_mux_init_signal("hsusb1_data3", OMAP_PIN_INPUT_PULLDOWN);
69 omap_mux_init_signal("hsusb1_data4", OMAP_PIN_INPUT_PULLDOWN);
70 omap_mux_init_signal("hsusb1_data5", OMAP_PIN_INPUT_PULLDOWN);
71 omap_mux_init_signal("hsusb1_data6", OMAP_PIN_INPUT_PULLDOWN);
72 omap_mux_init_signal("hsusb1_data7", OMAP_PIN_INPUT_PULLDOWN);
73 break;
74 case OMAP_EHCI_PORT_MODE_TLL:
75 omap_mux_init_signal("hsusb1_tll_stp",
76 OMAP_PIN_INPUT_PULLUP);
77 omap_mux_init_signal("hsusb1_tll_clk",
78 OMAP_PIN_INPUT_PULLDOWN);
79 omap_mux_init_signal("hsusb1_tll_dir",
80 OMAP_PIN_INPUT_PULLDOWN);
81 omap_mux_init_signal("hsusb1_tll_nxt",
82 OMAP_PIN_INPUT_PULLDOWN);
83 omap_mux_init_signal("hsusb1_tll_data0",
84 OMAP_PIN_INPUT_PULLDOWN);
85 omap_mux_init_signal("hsusb1_tll_data1",
86 OMAP_PIN_INPUT_PULLDOWN);
87 omap_mux_init_signal("hsusb1_tll_data2",
88 OMAP_PIN_INPUT_PULLDOWN);
89 omap_mux_init_signal("hsusb1_tll_data3",
90 OMAP_PIN_INPUT_PULLDOWN);
91 omap_mux_init_signal("hsusb1_tll_data4",
92 OMAP_PIN_INPUT_PULLDOWN);
93 omap_mux_init_signal("hsusb1_tll_data5",
94 OMAP_PIN_INPUT_PULLDOWN);
95 omap_mux_init_signal("hsusb1_tll_data6",
96 OMAP_PIN_INPUT_PULLDOWN);
97 omap_mux_init_signal("hsusb1_tll_data7",
98 OMAP_PIN_INPUT_PULLDOWN);
99 break;
100 case OMAP_USBHS_PORT_MODE_UNUSED:
101 /* FALLTHROUGH */
102 default:
103 break;
106 switch (port_mode[1]) {
107 case OMAP_EHCI_PORT_MODE_PHY:
108 omap_mux_init_signal("hsusb2_stp", OMAP_PIN_OUTPUT);
109 omap_mux_init_signal("hsusb2_clk", OMAP_PIN_OUTPUT);
110 omap_mux_init_signal("hsusb2_dir", OMAP_PIN_INPUT_PULLDOWN);
111 omap_mux_init_signal("hsusb2_nxt", OMAP_PIN_INPUT_PULLDOWN);
112 omap_mux_init_signal("hsusb2_data0",
113 OMAP_PIN_INPUT_PULLDOWN);
114 omap_mux_init_signal("hsusb2_data1",
115 OMAP_PIN_INPUT_PULLDOWN);
116 omap_mux_init_signal("hsusb2_data2",
117 OMAP_PIN_INPUT_PULLDOWN);
118 omap_mux_init_signal("hsusb2_data3",
119 OMAP_PIN_INPUT_PULLDOWN);
120 omap_mux_init_signal("hsusb2_data4",
121 OMAP_PIN_INPUT_PULLDOWN);
122 omap_mux_init_signal("hsusb2_data5",
123 OMAP_PIN_INPUT_PULLDOWN);
124 omap_mux_init_signal("hsusb2_data6",
125 OMAP_PIN_INPUT_PULLDOWN);
126 omap_mux_init_signal("hsusb2_data7",
127 OMAP_PIN_INPUT_PULLDOWN);
128 break;
129 case OMAP_EHCI_PORT_MODE_TLL:
130 omap_mux_init_signal("hsusb2_tll_stp",
131 OMAP_PIN_INPUT_PULLUP);
132 omap_mux_init_signal("hsusb2_tll_clk",
133 OMAP_PIN_INPUT_PULLDOWN);
134 omap_mux_init_signal("hsusb2_tll_dir",
135 OMAP_PIN_INPUT_PULLDOWN);
136 omap_mux_init_signal("hsusb2_tll_nxt",
137 OMAP_PIN_INPUT_PULLDOWN);
138 omap_mux_init_signal("hsusb2_tll_data0",
139 OMAP_PIN_INPUT_PULLDOWN);
140 omap_mux_init_signal("hsusb2_tll_data1",
141 OMAP_PIN_INPUT_PULLDOWN);
142 omap_mux_init_signal("hsusb2_tll_data2",
143 OMAP_PIN_INPUT_PULLDOWN);
144 omap_mux_init_signal("hsusb2_tll_data3",
145 OMAP_PIN_INPUT_PULLDOWN);
146 omap_mux_init_signal("hsusb2_tll_data4",
147 OMAP_PIN_INPUT_PULLDOWN);
148 omap_mux_init_signal("hsusb2_tll_data5",
149 OMAP_PIN_INPUT_PULLDOWN);
150 omap_mux_init_signal("hsusb2_tll_data6",
151 OMAP_PIN_INPUT_PULLDOWN);
152 omap_mux_init_signal("hsusb2_tll_data7",
153 OMAP_PIN_INPUT_PULLDOWN);
154 break;
155 case OMAP_USBHS_PORT_MODE_UNUSED:
156 /* FALLTHROUGH */
157 default:
158 break;
161 switch (port_mode[2]) {
162 case OMAP_EHCI_PORT_MODE_PHY:
163 printk(KERN_WARNING "Port3 can't be used in PHY mode\n");
164 break;
165 case OMAP_EHCI_PORT_MODE_TLL:
166 omap_mux_init_signal("hsusb3_tll_stp",
167 OMAP_PIN_INPUT_PULLUP);
168 omap_mux_init_signal("hsusb3_tll_clk",
169 OMAP_PIN_INPUT_PULLDOWN);
170 omap_mux_init_signal("hsusb3_tll_dir",
171 OMAP_PIN_INPUT_PULLDOWN);
172 omap_mux_init_signal("hsusb3_tll_nxt",
173 OMAP_PIN_INPUT_PULLDOWN);
174 omap_mux_init_signal("hsusb3_tll_data0",
175 OMAP_PIN_INPUT_PULLDOWN);
176 omap_mux_init_signal("hsusb3_tll_data1",
177 OMAP_PIN_INPUT_PULLDOWN);
178 omap_mux_init_signal("hsusb3_tll_data2",
179 OMAP_PIN_INPUT_PULLDOWN);
180 omap_mux_init_signal("hsusb3_tll_data3",
181 OMAP_PIN_INPUT_PULLDOWN);
182 omap_mux_init_signal("hsusb3_tll_data4",
183 OMAP_PIN_INPUT_PULLDOWN);
184 omap_mux_init_signal("hsusb3_tll_data5",
185 OMAP_PIN_INPUT_PULLDOWN);
186 omap_mux_init_signal("hsusb3_tll_data6",
187 OMAP_PIN_INPUT_PULLDOWN);
188 omap_mux_init_signal("hsusb3_tll_data7",
189 OMAP_PIN_INPUT_PULLDOWN);
190 break;
191 case OMAP_USBHS_PORT_MODE_UNUSED:
192 /* FALLTHROUGH */
193 default:
194 break;
197 return;
200 static void setup_4430ehci_io_mux(const enum usbhs_omap_port_mode *port_mode)
202 switch (port_mode[0]) {
203 case OMAP_EHCI_PORT_MODE_PHY:
204 omap_mux_init_signal("usbb1_ulpiphy_stp",
205 OMAP_PIN_OUTPUT);
206 omap_mux_init_signal("usbb1_ulpiphy_clk",
207 OMAP_PIN_INPUT_PULLDOWN);
208 omap_mux_init_signal("usbb1_ulpiphy_dir",
209 OMAP_PIN_INPUT_PULLDOWN);
210 omap_mux_init_signal("usbb1_ulpiphy_nxt",
211 OMAP_PIN_INPUT_PULLDOWN);
212 omap_mux_init_signal("usbb1_ulpiphy_dat0",
213 OMAP_PIN_INPUT_PULLDOWN);
214 omap_mux_init_signal("usbb1_ulpiphy_dat1",
215 OMAP_PIN_INPUT_PULLDOWN);
216 omap_mux_init_signal("usbb1_ulpiphy_dat2",
217 OMAP_PIN_INPUT_PULLDOWN);
218 omap_mux_init_signal("usbb1_ulpiphy_dat3",
219 OMAP_PIN_INPUT_PULLDOWN);
220 omap_mux_init_signal("usbb1_ulpiphy_dat4",
221 OMAP_PIN_INPUT_PULLDOWN);
222 omap_mux_init_signal("usbb1_ulpiphy_dat5",
223 OMAP_PIN_INPUT_PULLDOWN);
224 omap_mux_init_signal("usbb1_ulpiphy_dat6",
225 OMAP_PIN_INPUT_PULLDOWN);
226 omap_mux_init_signal("usbb1_ulpiphy_dat7",
227 OMAP_PIN_INPUT_PULLDOWN);
228 break;
229 case OMAP_EHCI_PORT_MODE_TLL:
230 omap_mux_init_signal("usbb1_ulpitll_stp",
231 OMAP_PIN_INPUT_PULLUP);
232 omap_mux_init_signal("usbb1_ulpitll_clk",
233 OMAP_PIN_INPUT_PULLDOWN);
234 omap_mux_init_signal("usbb1_ulpitll_dir",
235 OMAP_PIN_INPUT_PULLDOWN);
236 omap_mux_init_signal("usbb1_ulpitll_nxt",
237 OMAP_PIN_INPUT_PULLDOWN);
238 omap_mux_init_signal("usbb1_ulpitll_dat0",
239 OMAP_PIN_INPUT_PULLDOWN);
240 omap_mux_init_signal("usbb1_ulpitll_dat1",
241 OMAP_PIN_INPUT_PULLDOWN);
242 omap_mux_init_signal("usbb1_ulpitll_dat2",
243 OMAP_PIN_INPUT_PULLDOWN);
244 omap_mux_init_signal("usbb1_ulpitll_dat3",
245 OMAP_PIN_INPUT_PULLDOWN);
246 omap_mux_init_signal("usbb1_ulpitll_dat4",
247 OMAP_PIN_INPUT_PULLDOWN);
248 omap_mux_init_signal("usbb1_ulpitll_dat5",
249 OMAP_PIN_INPUT_PULLDOWN);
250 omap_mux_init_signal("usbb1_ulpitll_dat6",
251 OMAP_PIN_INPUT_PULLDOWN);
252 omap_mux_init_signal("usbb1_ulpitll_dat7",
253 OMAP_PIN_INPUT_PULLDOWN);
254 break;
255 case OMAP_USBHS_PORT_MODE_UNUSED:
256 default:
257 break;
259 switch (port_mode[1]) {
260 case OMAP_EHCI_PORT_MODE_PHY:
261 omap_mux_init_signal("usbb2_ulpiphy_stp",
262 OMAP_PIN_OUTPUT);
263 omap_mux_init_signal("usbb2_ulpiphy_clk",
264 OMAP_PIN_INPUT_PULLDOWN);
265 omap_mux_init_signal("usbb2_ulpiphy_dir",
266 OMAP_PIN_INPUT_PULLDOWN);
267 omap_mux_init_signal("usbb2_ulpiphy_nxt",
268 OMAP_PIN_INPUT_PULLDOWN);
269 omap_mux_init_signal("usbb2_ulpiphy_dat0",
270 OMAP_PIN_INPUT_PULLDOWN);
271 omap_mux_init_signal("usbb2_ulpiphy_dat1",
272 OMAP_PIN_INPUT_PULLDOWN);
273 omap_mux_init_signal("usbb2_ulpiphy_dat2",
274 OMAP_PIN_INPUT_PULLDOWN);
275 omap_mux_init_signal("usbb2_ulpiphy_dat3",
276 OMAP_PIN_INPUT_PULLDOWN);
277 omap_mux_init_signal("usbb2_ulpiphy_dat4",
278 OMAP_PIN_INPUT_PULLDOWN);
279 omap_mux_init_signal("usbb2_ulpiphy_dat5",
280 OMAP_PIN_INPUT_PULLDOWN);
281 omap_mux_init_signal("usbb2_ulpiphy_dat6",
282 OMAP_PIN_INPUT_PULLDOWN);
283 omap_mux_init_signal("usbb2_ulpiphy_dat7",
284 OMAP_PIN_INPUT_PULLDOWN);
285 break;
286 case OMAP_EHCI_PORT_MODE_TLL:
287 omap_mux_init_signal("usbb2_ulpitll_stp",
288 OMAP_PIN_INPUT_PULLUP);
289 omap_mux_init_signal("usbb2_ulpitll_clk",
290 OMAP_PIN_INPUT_PULLDOWN);
291 omap_mux_init_signal("usbb2_ulpitll_dir",
292 OMAP_PIN_INPUT_PULLDOWN);
293 omap_mux_init_signal("usbb2_ulpitll_nxt",
294 OMAP_PIN_INPUT_PULLDOWN);
295 omap_mux_init_signal("usbb2_ulpitll_dat0",
296 OMAP_PIN_INPUT_PULLDOWN);
297 omap_mux_init_signal("usbb2_ulpitll_dat1",
298 OMAP_PIN_INPUT_PULLDOWN);
299 omap_mux_init_signal("usbb2_ulpitll_dat2",
300 OMAP_PIN_INPUT_PULLDOWN);
301 omap_mux_init_signal("usbb2_ulpitll_dat3",
302 OMAP_PIN_INPUT_PULLDOWN);
303 omap_mux_init_signal("usbb2_ulpitll_dat4",
304 OMAP_PIN_INPUT_PULLDOWN);
305 omap_mux_init_signal("usbb2_ulpitll_dat5",
306 OMAP_PIN_INPUT_PULLDOWN);
307 omap_mux_init_signal("usbb2_ulpitll_dat6",
308 OMAP_PIN_INPUT_PULLDOWN);
309 omap_mux_init_signal("usbb2_ulpitll_dat7",
310 OMAP_PIN_INPUT_PULLDOWN);
311 break;
312 case OMAP_USBHS_PORT_MODE_UNUSED:
313 default:
314 break;
318 static void setup_ohci_io_mux(const enum usbhs_omap_port_mode *port_mode)
320 switch (port_mode[0]) {
321 case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
322 case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
323 case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
324 case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
325 omap_mux_init_signal("mm1_rxdp",
326 OMAP_PIN_INPUT_PULLDOWN);
327 omap_mux_init_signal("mm1_rxdm",
328 OMAP_PIN_INPUT_PULLDOWN);
329 /* FALLTHROUGH */
330 case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
331 case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
332 omap_mux_init_signal("mm1_rxrcv",
333 OMAP_PIN_INPUT_PULLDOWN);
334 /* FALLTHROUGH */
335 case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
336 case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
337 omap_mux_init_signal("mm1_txen_n", OMAP_PIN_OUTPUT);
338 /* FALLTHROUGH */
339 case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
340 case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
341 omap_mux_init_signal("mm1_txse0",
342 OMAP_PIN_INPUT_PULLDOWN);
343 omap_mux_init_signal("mm1_txdat",
344 OMAP_PIN_INPUT_PULLDOWN);
345 break;
346 case OMAP_USBHS_PORT_MODE_UNUSED:
347 /* FALLTHROUGH */
348 default:
349 break;
351 switch (port_mode[1]) {
352 case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
353 case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
354 case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
355 case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
356 omap_mux_init_signal("mm2_rxdp",
357 OMAP_PIN_INPUT_PULLDOWN);
358 omap_mux_init_signal("mm2_rxdm",
359 OMAP_PIN_INPUT_PULLDOWN);
360 /* FALLTHROUGH */
361 case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
362 case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
363 omap_mux_init_signal("mm2_rxrcv",
364 OMAP_PIN_INPUT_PULLDOWN);
365 /* FALLTHROUGH */
366 case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
367 case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
368 omap_mux_init_signal("mm2_txen_n", OMAP_PIN_OUTPUT);
369 /* FALLTHROUGH */
370 case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
371 case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
372 omap_mux_init_signal("mm2_txse0",
373 OMAP_PIN_INPUT_PULLDOWN);
374 omap_mux_init_signal("mm2_txdat",
375 OMAP_PIN_INPUT_PULLDOWN);
376 break;
377 case OMAP_USBHS_PORT_MODE_UNUSED:
378 /* FALLTHROUGH */
379 default:
380 break;
382 switch (port_mode[2]) {
383 case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
384 case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
385 case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
386 case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
387 omap_mux_init_signal("mm3_rxdp",
388 OMAP_PIN_INPUT_PULLDOWN);
389 omap_mux_init_signal("mm3_rxdm",
390 OMAP_PIN_INPUT_PULLDOWN);
391 /* FALLTHROUGH */
392 case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
393 case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
394 omap_mux_init_signal("mm3_rxrcv",
395 OMAP_PIN_INPUT_PULLDOWN);
396 /* FALLTHROUGH */
397 case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
398 case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
399 omap_mux_init_signal("mm3_txen_n", OMAP_PIN_OUTPUT);
400 /* FALLTHROUGH */
401 case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
402 case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
403 omap_mux_init_signal("mm3_txse0",
404 OMAP_PIN_INPUT_PULLDOWN);
405 omap_mux_init_signal("mm3_txdat",
406 OMAP_PIN_INPUT_PULLDOWN);
407 break;
408 case OMAP_USBHS_PORT_MODE_UNUSED:
409 /* FALLTHROUGH */
410 default:
411 break;
415 static void setup_4430ohci_io_mux(const enum usbhs_omap_port_mode *port_mode)
417 switch (port_mode[0]) {
418 case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
419 case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
420 case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
421 case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
422 omap_mux_init_signal("usbb1_mm_rxdp",
423 OMAP_PIN_INPUT_PULLDOWN);
424 omap_mux_init_signal("usbb1_mm_rxdm",
425 OMAP_PIN_INPUT_PULLDOWN);
427 case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
428 case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
429 omap_mux_init_signal("usbb1_mm_rxrcv",
430 OMAP_PIN_INPUT_PULLDOWN);
432 case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
433 case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
434 omap_mux_init_signal("usbb1_mm_txen",
435 OMAP_PIN_INPUT_PULLDOWN);
438 case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
439 case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
440 omap_mux_init_signal("usbb1_mm_txdat",
441 OMAP_PIN_INPUT_PULLDOWN);
442 omap_mux_init_signal("usbb1_mm_txse0",
443 OMAP_PIN_INPUT_PULLDOWN);
444 break;
446 case OMAP_USBHS_PORT_MODE_UNUSED:
447 default:
448 break;
451 switch (port_mode[1]) {
452 case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
453 case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
454 case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
455 case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
456 omap_mux_init_signal("usbb2_mm_rxdp",
457 OMAP_PIN_INPUT_PULLDOWN);
458 omap_mux_init_signal("usbb2_mm_rxdm",
459 OMAP_PIN_INPUT_PULLDOWN);
461 case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
462 case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
463 omap_mux_init_signal("usbb2_mm_rxrcv",
464 OMAP_PIN_INPUT_PULLDOWN);
466 case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
467 case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
468 omap_mux_init_signal("usbb2_mm_txen",
469 OMAP_PIN_INPUT_PULLDOWN);
472 case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
473 case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
474 omap_mux_init_signal("usbb2_mm_txdat",
475 OMAP_PIN_INPUT_PULLDOWN);
476 omap_mux_init_signal("usbb2_mm_txse0",
477 OMAP_PIN_INPUT_PULLDOWN);
478 break;
480 case OMAP_USBHS_PORT_MODE_UNUSED:
481 default:
482 break;
486 void __init usbhs_init(const struct usbhs_omap_board_data *pdata)
488 struct omap_hwmod *oh[2];
489 struct platform_device *pdev;
490 int bus_id = -1;
491 int i;
493 for (i = 0; i < OMAP3_HS_USB_PORTS; i++) {
494 usbhs_data.port_mode[i] = pdata->port_mode[i];
495 ohci_data.port_mode[i] = pdata->port_mode[i];
496 ehci_data.port_mode[i] = pdata->port_mode[i];
497 ehci_data.reset_gpio_port[i] = pdata->reset_gpio_port[i];
498 ehci_data.regulator[i] = pdata->regulator[i];
500 ehci_data.phy_reset = pdata->phy_reset;
501 ohci_data.es2_compatibility = pdata->es2_compatibility;
502 usbhs_data.ehci_data = &ehci_data;
503 usbhs_data.ohci_data = &ohci_data;
505 if (cpu_is_omap34xx()) {
506 setup_ehci_io_mux(pdata->port_mode);
507 setup_ohci_io_mux(pdata->port_mode);
508 } else if (cpu_is_omap44xx()) {
509 setup_4430ehci_io_mux(pdata->port_mode);
510 setup_4430ohci_io_mux(pdata->port_mode);
513 oh[0] = omap_hwmod_lookup(USBHS_UHH_HWMODNAME);
514 if (!oh[0]) {
515 pr_err("Could not look up %s\n", USBHS_UHH_HWMODNAME);
516 return;
519 oh[1] = omap_hwmod_lookup(USBHS_TLL_HWMODNAME);
520 if (!oh[1]) {
521 pr_err("Could not look up %s\n", USBHS_TLL_HWMODNAME);
522 return;
525 pdev = omap_device_build_ss(OMAP_USBHS_DEVICE, bus_id, oh, 2,
526 (void *)&usbhs_data, sizeof(usbhs_data),
527 omap_uhhtll_latency,
528 ARRAY_SIZE(omap_uhhtll_latency), false);
529 if (IS_ERR(pdev)) {
530 pr_err("Could not build hwmod devices %s,%s\n",
531 USBHS_UHH_HWMODNAME, USBHS_TLL_HWMODNAME);
532 return;
536 #else
538 void __init usbhs_init(const struct usbhs_omap_board_data *pdata)
542 #endif