spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / arm / mach-pxa / include / mach / lpd270.h
blob4edc712a2de88094d6d77f881b6761a84b913115
1 /*
2 * arch/arm/mach-pxa/include/mach/lpd270.h
4 * Author: Lennert Buytenhek
5 * Created: Feb 10, 2006
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #ifndef __ASM_ARCH_LPD270_H
13 #define __ASM_ARCH_LPD270_H
15 #define LPD270_CPLD_PHYS PXA_CS2_PHYS
16 #define LPD270_CPLD_VIRT IOMEM(0xf0000000)
17 #define LPD270_CPLD_SIZE 0x00100000
19 #define LPD270_ETH_PHYS (PXA_CS2_PHYS + 0x01000000)
21 /* CPLD registers */
22 #define LPD270_CPLD_REG(x) (LPD270_CPLD_VIRT + (x))
23 #define LPD270_CONTROL LPD270_CPLD_REG(0x00)
24 #define LPD270_PERIPHERAL0 LPD270_CPLD_REG(0x04)
25 #define LPD270_PERIPHERAL1 LPD270_CPLD_REG(0x08)
26 #define LPD270_CPLD_REVISION LPD270_CPLD_REG(0x14)
27 #define LPD270_EEPROM_SPI_ITF LPD270_CPLD_REG(0x20)
28 #define LPD270_MODE_PINS LPD270_CPLD_REG(0x24)
29 #define LPD270_EGPIO LPD270_CPLD_REG(0x30)
30 #define LPD270_INT_MASK LPD270_CPLD_REG(0x40)
31 #define LPD270_INT_STATUS LPD270_CPLD_REG(0x50)
33 #define LPD270_INT_AC97 (1 << 4) /* AC'97 CODEC IRQ */
34 #define LPD270_INT_ETHERNET (1 << 3) /* Ethernet controller IRQ */
35 #define LPD270_INT_USBC (1 << 2) /* USB client cable detection IRQ */
37 #define LPD270_IRQ(x) (IRQ_BOARD_START + (x))
38 #define LPD270_USBC_IRQ LPD270_IRQ(2)
39 #define LPD270_ETHERNET_IRQ LPD270_IRQ(3)
40 #define LPD270_AC97_IRQ LPD270_IRQ(4)
41 #define LPD270_NR_IRQS (IRQ_BOARD_START + 5)
43 #endif