spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / arm / mach-pxa / include / mach / mioa701.h
blob02868447b0b135d56b4e9c687233358280da77b3
1 #ifndef _MIOA701_H_
2 #define _MIOA701_H_
4 #define MIO_CFG_IN(pin, af) \
5 ((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DIR_MASK)) |\
6 (MFP_PIN(pin) | MFP_##af | MFP_DIR_IN))
8 #define MIO_CFG_OUT(pin, af, state) \
9 ((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DIR_MASK | MFP_LPM_STATE_MASK)) |\
10 (MFP_PIN(pin) | MFP_##af | MFP_DIR_OUT | MFP_LPM_##state))
12 /* Global GPIOs */
13 #define GPIO9_CHARGE_EN 9
14 #define GPIO18_POWEROFF 18
15 #define GPIO87_LCD_POWER 87
16 #define GPIO96_AC_DETECT 96
17 #define GPIO80_MAYBE_CHARGE_VDROP 80 /* Drop of 88mV */
19 /* USB */
20 #define GPIO13_nUSB_DETECT 13
21 #define GPIO22_USB_ENABLE 22
23 /* SDIO bits */
24 #define GPIO78_SDIO_RO 78
25 #define GPIO15_SDIO_INSERT 15
26 #define GPIO91_SDIO_EN 91
28 /* Bluetooth */
29 #define GPIO14_BT_nACTIVITY 14
30 #define GPIO83_BT_ON 83
31 #define GPIO77_BT_UNKNOWN1 77
32 #define GPIO86_BT_MAYBE_nRESET 86
34 /* GPS */
35 #define GPIO23_GPS_UNKNOWN1 23
36 #define GPIO26_GPS_ON 26
37 #define GPIO27_GPS_RESET 27
38 #define GPIO106_GPS_UNKNOWN2 106
39 #define GPIO107_GPS_UNKNOWN3 107
41 /* GSM */
42 #define GPIO24_GSM_MOD_RESET_CMD 24
43 #define GPIO88_GSM_nMOD_ON_CMD 88
44 #define GPIO90_GSM_nMOD_OFF_CMD 90
45 #define GPIO114_GSM_nMOD_DTE_UART_STATE 114
46 #define GPIO25_GSM_MOD_ON_STATE 25
47 #define GPIO113_GSM_EVENT 113
49 /* SOUND */
50 #define GPIO12_HPJACK_INSERT 12
52 /* LEDS */
53 #define GPIO10_LED_nCharging 10
54 #define GPIO97_LED_nBlue 97
55 #define GPIO98_LED_nOrange 98
56 #define GPIO82_LED_nVibra 82
57 #define GPIO115_LED_nKeyboard 115
59 /* Keyboard */
60 #define GPIO0_KEY_POWER 0
61 #define GPIO93_KEY_VOLUME_UP 93
62 #define GPIO94_KEY_VOLUME_DOWN 94
64 extern struct input_dev *mioa701_evdev;
65 extern void mioa701_gpio_lpm_set(unsigned long mfp_pin);
67 /* Assembler externals mioa701_bootresume.S */
68 extern u32 mioa701_bootstrap;
69 extern u32 mioa701_jumpaddr;
70 extern u32 mioa701_bootstrap_lg;
72 #endif /* _MIOA701_H */