spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / arm / mach-pxa / include / mach / palmz72.h
blob0d4700a796124f2c507254b30c867022cb4f5763
1 /*
2 * GPIOs and interrupts for Palm Zire72 Handheld Computer
4 * Authors: Alex Osborne <bobofdoom@gmail.com>
5 * Jan Herman <2hp@seznam.cz>
6 * Sergey Lapin <slapin@ossfans.org>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
14 #ifndef _INCLUDE_PALMZ72_H_
15 #define _INCLUDE_PALMZ72_H_
17 /* Power and control */
18 #define GPIO_NR_PALMZ72_GPIO_RESET 1
19 #define GPIO_NR_PALMZ72_POWER_DETECT 0
21 /* SD/MMC */
22 #define GPIO_NR_PALMZ72_SD_DETECT_N 14
23 #define GPIO_NR_PALMZ72_SD_POWER_N 98
24 #define GPIO_NR_PALMZ72_SD_RO 115
26 /* Touchscreen */
27 #define GPIO_NR_PALMZ72_WM9712_IRQ 27
29 /* IRDA - disable GPIO connected to SD pin of tranceiver (TFBS4710?) ? */
30 #define GPIO_NR_PALMZ72_IR_DISABLE 49
32 /* USB */
33 #define GPIO_NR_PALMZ72_USB_DETECT_N 15
34 #define GPIO_NR_PALMZ72_USB_PULLUP 95
36 /* LCD/Backlight */
37 #define GPIO_NR_PALMZ72_BL_POWER 20
38 #define GPIO_NR_PALMZ72_LCD_POWER 96
40 /* LED */
41 #define GPIO_NR_PALMZ72_LED_GREEN 88
43 /* Bluetooth */
44 #define GPIO_NR_PALMZ72_BT_POWER 17
45 #define GPIO_NR_PALMZ72_BT_RESET 83
47 /* Camera */
48 #define GPIO_NR_PALMZ72_CAM_PWDN 56
49 #define GPIO_NR_PALMZ72_CAM_RESET 57
50 #define GPIO_NR_PALMZ72_CAM_POWER 91
52 /** Initial values **/
54 /* Battery */
55 #define PALMZ72_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */
56 #define PALMZ72_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */
57 #define PALMZ72_BAT_MAX_CURRENT 0 /* unknown */
58 #define PALMZ72_BAT_MIN_CURRENT 0 /* unknown */
59 #define PALMZ72_BAT_MAX_CHARGE 1 /* unknown */
60 #define PALMZ72_BAT_MIN_CHARGE 1 /* unknown */
61 #define PALMZ72_MAX_LIFE_MINS 360 /* on-life in minutes */
63 /* Backlight */
64 #define PALMZ72_MAX_INTENSITY 0xFE
65 #define PALMZ72_DEFAULT_INTENSITY 0x7E
66 #define PALMZ72_LIMIT_MASK 0x7F
67 #define PALMZ72_PRESCALER 0x3F
68 #define PALMZ72_PERIOD_NS 3500
70 #ifdef CONFIG_PM
71 struct palmz72_resume_info {
72 u32 magic0; /* 0x0 */
73 u32 magic1; /* 0x4 */
74 u32 resume_addr; /* 0x8 */
75 u32 pad[11]; /* 0xc..0x37 */
76 u32 arm_control; /* 0x38 */
77 u32 aux_control; /* 0x3c */
78 u32 ttb; /* 0x40 */
79 u32 domain_access; /* 0x44 */
80 u32 process_id; /* 0x48 */
82 #endif
83 #endif