spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / arm / mach-pxa / mfp-pxa3xx.c
blob89863a01ecd7a438cff6692c8396a6327347851c
1 /*
2 * linux/arch/arm/mach-pxa/mfp.c
4 * PXA3xx Multi-Function Pin Support
6 * Copyright (C) 2007 Marvell Internation Ltd.
8 * 2007-08-21: eric miao <eric.miao@marvell.com>
9 * initial version
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
16 #include <linux/module.h>
17 #include <linux/kernel.h>
18 #include <linux/init.h>
19 #include <linux/io.h>
20 #include <linux/syscore_ops.h>
22 #include <mach/hardware.h>
23 #include <mach/mfp-pxa3xx.h>
24 #include <mach/pxa3xx-regs.h>
26 #ifdef CONFIG_PM
28 * Configure the MFPs appropriately for suspend/resume.
29 * FIXME: this should probably depend on which system state we're
30 * entering - for instance, we might not want to place MFP pins in
31 * a pull-down mode if they're an active low chip select, and we're
32 * just entering standby.
34 static int pxa3xx_mfp_suspend(void)
36 mfp_config_lpm();
37 return 0;
40 static void pxa3xx_mfp_resume(void)
42 mfp_config_run();
44 /* clear RDH bit when MFP settings are restored
46 * NOTE: the last 3 bits DxS are write-1-to-clear so carefully
47 * preserve them here in case they will be referenced later
49 ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S);
51 #else
52 #define pxa3xx_mfp_suspend NULL
53 #define pxa3xx_mfp_resume NULL
54 #endif
56 struct syscore_ops pxa3xx_mfp_syscore_ops = {
57 .suspend = pxa3xx_mfp_suspend,
58 .resume = pxa3xx_mfp_resume,