spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / arm / mach-s3c2412 / gpio.c
blob4526f6ba31a8741924e7e75ec5b63a2b8ce4c440
1 /* linux/arch/arm/mach-s3c2412/gpio.c
3 * Copyright (c) 2007 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/.
8 * S3C2412/S3C2413 specific GPIO support
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/kernel.h>
16 #include <linux/types.h>
17 #include <linux/module.h>
18 #include <linux/interrupt.h>
19 #include <linux/gpio.h>
21 #include <asm/mach/arch.h>
22 #include <asm/mach/map.h>
24 #include <mach/regs-gpio.h>
25 #include <mach/hardware.h>
27 #include <plat/gpio-core.h>
29 int s3c2412_gpio_set_sleepcfg(unsigned int pin, unsigned int state)
31 struct samsung_gpio_chip *chip = samsung_gpiolib_getchip(pin);
32 unsigned long offs = pin - chip->chip.base;
33 unsigned long flags;
34 unsigned long slpcon;
36 offs *= 2;
38 if (pin < S3C2410_GPB(0))
39 return -EINVAL;
41 if (pin >= S3C2410_GPF(0) &&
42 pin <= S3C2410_GPG(16))
43 return -EINVAL;
45 if (pin > S3C2410_GPH(16))
46 return -EINVAL;
48 local_irq_save(flags);
50 slpcon = __raw_readl(chip->base + 0x0C);
52 slpcon &= ~(3 << offs);
53 slpcon |= state << offs;
55 __raw_writel(slpcon, chip->base + 0x0C);
57 local_irq_restore(flags);
59 return 0;
62 EXPORT_SYMBOL(s3c2412_gpio_set_sleepcfg);