spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / arm / mach-s3c64xx / include / mach / gpio.h
blob8b540c42d5ddeae84b79efb650bdc9989406194b
1 /* arch/arm/mach-s3c6400/include/mach/gpio.h
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * http://armlinux.simtec.co.uk/
6 * Ben Dooks <ben@simtec.co.uk>
8 * S3C6400 - GPIO lib support
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 /* GPIO bank sizes */
16 #define S3C64XX_GPIO_A_NR (8)
17 #define S3C64XX_GPIO_B_NR (7)
18 #define S3C64XX_GPIO_C_NR (8)
19 #define S3C64XX_GPIO_D_NR (5)
20 #define S3C64XX_GPIO_E_NR (5)
21 #define S3C64XX_GPIO_F_NR (16)
22 #define S3C64XX_GPIO_G_NR (7)
23 #define S3C64XX_GPIO_H_NR (10)
24 #define S3C64XX_GPIO_I_NR (16)
25 #define S3C64XX_GPIO_J_NR (12)
26 #define S3C64XX_GPIO_K_NR (16)
27 #define S3C64XX_GPIO_L_NR (15)
28 #define S3C64XX_GPIO_M_NR (6)
29 #define S3C64XX_GPIO_N_NR (16)
30 #define S3C64XX_GPIO_O_NR (16)
31 #define S3C64XX_GPIO_P_NR (15)
32 #define S3C64XX_GPIO_Q_NR (9)
34 /* GPIO bank numbes */
36 /* CONFIG_S3C_GPIO_SPACE allows the user to select extra
37 * space for debugging purposes so that any accidental
38 * change from one gpio bank to another can be caught.
41 #define S3C64XX_GPIO_NEXT(__gpio) \
42 ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
44 enum s3c_gpio_number {
45 S3C64XX_GPIO_A_START = 0,
46 S3C64XX_GPIO_B_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_A),
47 S3C64XX_GPIO_C_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_B),
48 S3C64XX_GPIO_D_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_C),
49 S3C64XX_GPIO_E_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_D),
50 S3C64XX_GPIO_F_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_E),
51 S3C64XX_GPIO_G_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_F),
52 S3C64XX_GPIO_H_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_G),
53 S3C64XX_GPIO_I_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_H),
54 S3C64XX_GPIO_J_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_I),
55 S3C64XX_GPIO_K_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_J),
56 S3C64XX_GPIO_L_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_K),
57 S3C64XX_GPIO_M_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_L),
58 S3C64XX_GPIO_N_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_M),
59 S3C64XX_GPIO_O_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_N),
60 S3C64XX_GPIO_P_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_O),
61 S3C64XX_GPIO_Q_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_P),
64 /* S3C64XX GPIO number definitions. */
66 #define S3C64XX_GPA(_nr) (S3C64XX_GPIO_A_START + (_nr))
67 #define S3C64XX_GPB(_nr) (S3C64XX_GPIO_B_START + (_nr))
68 #define S3C64XX_GPC(_nr) (S3C64XX_GPIO_C_START + (_nr))
69 #define S3C64XX_GPD(_nr) (S3C64XX_GPIO_D_START + (_nr))
70 #define S3C64XX_GPE(_nr) (S3C64XX_GPIO_E_START + (_nr))
71 #define S3C64XX_GPF(_nr) (S3C64XX_GPIO_F_START + (_nr))
72 #define S3C64XX_GPG(_nr) (S3C64XX_GPIO_G_START + (_nr))
73 #define S3C64XX_GPH(_nr) (S3C64XX_GPIO_H_START + (_nr))
74 #define S3C64XX_GPI(_nr) (S3C64XX_GPIO_I_START + (_nr))
75 #define S3C64XX_GPJ(_nr) (S3C64XX_GPIO_J_START + (_nr))
76 #define S3C64XX_GPK(_nr) (S3C64XX_GPIO_K_START + (_nr))
77 #define S3C64XX_GPL(_nr) (S3C64XX_GPIO_L_START + (_nr))
78 #define S3C64XX_GPM(_nr) (S3C64XX_GPIO_M_START + (_nr))
79 #define S3C64XX_GPN(_nr) (S3C64XX_GPIO_N_START + (_nr))
80 #define S3C64XX_GPO(_nr) (S3C64XX_GPIO_O_START + (_nr))
81 #define S3C64XX_GPP(_nr) (S3C64XX_GPIO_P_START + (_nr))
82 #define S3C64XX_GPQ(_nr) (S3C64XX_GPIO_Q_START + (_nr))
84 /* the end of the S3C64XX specific gpios */
85 #define S3C64XX_GPIO_END (S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1)
86 #define S3C_GPIO_END S3C64XX_GPIO_END
88 /* define the number of gpios we need to the one after the GPQ() range */
89 #define GPIO_BOARD_START (S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1)
91 #define BOARD_NR_GPIOS (16 + CONFIG_SAMSUNG_GPIO_EXTRA)
93 #define ARCH_NR_GPIOS (GPIO_BOARD_START + BOARD_NR_GPIOS)