1 /* linux/arch/arm/mach-s3c64xx/cpu.c
3 * Copyright 2009 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 * http://armlinux.simtec.co.uk/
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/kernel.h>
13 #include <linux/types.h>
14 #include <linux/interrupt.h>
15 #include <linux/list.h>
16 #include <linux/timer.h>
17 #include <linux/init.h>
18 #include <linux/clk.h>
20 #include <linux/device.h>
21 #include <linux/serial_core.h>
22 #include <linux/platform_device.h>
24 #include <asm/mach/arch.h>
25 #include <asm/mach/map.h>
26 #include <asm/mach/irq.h>
28 #include <mach/hardware.h>
31 #include <plat/cpu-freq.h>
32 #include <plat/regs-serial.h>
33 #include <mach/regs-clock.h>
36 #include <plat/devs.h>
37 #include <plat/clock.h>
38 #include <plat/sdhci.h>
39 #include <plat/iic-core.h>
40 #include <plat/onenand-core.h>
44 void __init
s3c6400_map_io(void)
48 s3c6400_default_sdhci0();
49 s3c6400_default_sdhci1();
50 s3c6400_default_sdhci2();
52 /* the i2c devices are directly compatible with s3c2440 */
53 s3c_i2c0_setname("s3c2440-i2c");
55 s3c_device_nand
.name
= "s3c6400-nand";
57 s3c_onenand_setname("s3c6400-onenand");
58 s3c64xx_onenand1_setname("s3c6400-onenand");
61 void __init
s3c6400_init_clocks(int xtal
)
63 s3c64xx_register_clocks(xtal
, S3C6400_CLKDIV0_ARM_MASK
);
64 s3c64xx_setup_clocks();
67 void __init
s3c6400_init_irq(void)
69 /* VIC0 does not have IRQS 5..7,
70 * VIC1 is fully populated. */
71 s3c64xx_init_irq(~0 & ~(0xf << 5), ~0);
74 static struct bus_type s3c6400_subsys
= {
75 .name
= "s3c6400-core",
76 .dev_name
= "s3c6400-core",
79 static struct device s3c6400_dev
= {
80 .bus
= &s3c6400_subsys
,
83 static int __init
s3c6400_core_init(void)
85 return subsys_system_register(&s3c6400_subsys
, NULL
);
88 core_initcall(s3c6400_core_init
);
90 int __init
s3c6400_init(void)
92 printk("S3C6400: Initialising architecture\n");
94 return device_register(&s3c6400_dev
);