spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / arm / mach-s5p64x0 / include / mach / gpio.h
blob06cd3c9b16ac14708831cffaf516f8d430b0a80b
1 /* linux/arch/arm/mach-s5p64x0/include/mach/gpio.h
3 * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
6 * S5P64X0 - GPIO lib support
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #ifndef __ASM_ARCH_GPIO_H
14 #define __ASM_ARCH_GPIO_H __FILE__
16 /* GPIO bank sizes */
18 #define S5P6440_GPIO_A_NR (6)
19 #define S5P6440_GPIO_B_NR (7)
20 #define S5P6440_GPIO_C_NR (8)
21 #define S5P6440_GPIO_F_NR (16)
22 #define S5P6440_GPIO_G_NR (7)
23 #define S5P6440_GPIO_H_NR (10)
24 #define S5P6440_GPIO_I_NR (16)
25 #define S5P6440_GPIO_J_NR (12)
26 #define S5P6440_GPIO_N_NR (16)
27 #define S5P6440_GPIO_P_NR (8)
28 #define S5P6440_GPIO_R_NR (15)
30 #define S5P6450_GPIO_A_NR (6)
31 #define S5P6450_GPIO_B_NR (7)
32 #define S5P6450_GPIO_C_NR (8)
33 #define S5P6450_GPIO_D_NR (8)
34 #define S5P6450_GPIO_F_NR (16)
35 #define S5P6450_GPIO_G_NR (14)
36 #define S5P6450_GPIO_H_NR (10)
37 #define S5P6450_GPIO_I_NR (16)
38 #define S5P6450_GPIO_J_NR (12)
39 #define S5P6450_GPIO_K_NR (5)
40 #define S5P6450_GPIO_N_NR (16)
41 #define S5P6450_GPIO_P_NR (11)
42 #define S5P6450_GPIO_Q_NR (14)
43 #define S5P6450_GPIO_R_NR (15)
44 #define S5P6450_GPIO_S_NR (8)
46 /* GPIO bank numbers */
48 /* CONFIG_S3C_GPIO_SPACE allows the user to select extra
49 * space for debugging purposes so that any accidental
50 * change from one gpio bank to another can be caught.
53 #define S5P64X0_GPIO_NEXT(__gpio) \
54 ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
56 enum s5p6440_gpio_number {
57 S5P6440_GPIO_A_START = 0,
58 S5P6440_GPIO_B_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_A),
59 S5P6440_GPIO_C_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_B),
60 S5P6440_GPIO_F_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_C),
61 S5P6440_GPIO_G_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_F),
62 S5P6440_GPIO_H_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_G),
63 S5P6440_GPIO_I_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_H),
64 S5P6440_GPIO_J_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_I),
65 S5P6440_GPIO_N_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_J),
66 S5P6440_GPIO_P_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_N),
67 S5P6440_GPIO_R_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_P),
70 enum s5p6450_gpio_number {
71 S5P6450_GPIO_A_START = 0,
72 S5P6450_GPIO_B_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_A),
73 S5P6450_GPIO_C_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_B),
74 S5P6450_GPIO_D_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_C),
75 S5P6450_GPIO_F_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_D),
76 S5P6450_GPIO_G_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_F),
77 S5P6450_GPIO_H_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_G),
78 S5P6450_GPIO_I_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_H),
79 S5P6450_GPIO_J_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_I),
80 S5P6450_GPIO_K_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_J),
81 S5P6450_GPIO_N_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_K),
82 S5P6450_GPIO_P_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_N),
83 S5P6450_GPIO_Q_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_P),
84 S5P6450_GPIO_R_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_Q),
85 S5P6450_GPIO_S_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_R),
88 /* GPIO number definitions */
90 #define S5P6440_GPA(_nr) (S5P6440_GPIO_A_START + (_nr))
91 #define S5P6440_GPB(_nr) (S5P6440_GPIO_B_START + (_nr))
92 #define S5P6440_GPC(_nr) (S5P6440_GPIO_C_START + (_nr))
93 #define S5P6440_GPF(_nr) (S5P6440_GPIO_F_START + (_nr))
94 #define S5P6440_GPG(_nr) (S5P6440_GPIO_G_START + (_nr))
95 #define S5P6440_GPH(_nr) (S5P6440_GPIO_H_START + (_nr))
96 #define S5P6440_GPI(_nr) (S5P6440_GPIO_I_START + (_nr))
97 #define S5P6440_GPJ(_nr) (S5P6440_GPIO_J_START + (_nr))
98 #define S5P6440_GPN(_nr) (S5P6440_GPIO_N_START + (_nr))
99 #define S5P6440_GPP(_nr) (S5P6440_GPIO_P_START + (_nr))
100 #define S5P6440_GPR(_nr) (S5P6440_GPIO_R_START + (_nr))
102 #define S5P6450_GPA(_nr) (S5P6450_GPIO_A_START + (_nr))
103 #define S5P6450_GPB(_nr) (S5P6450_GPIO_B_START + (_nr))
104 #define S5P6450_GPC(_nr) (S5P6450_GPIO_C_START + (_nr))
105 #define S5P6450_GPD(_nr) (S5P6450_GPIO_D_START + (_nr))
106 #define S5P6450_GPF(_nr) (S5P6450_GPIO_F_START + (_nr))
107 #define S5P6450_GPG(_nr) (S5P6450_GPIO_G_START + (_nr))
108 #define S5P6450_GPH(_nr) (S5P6450_GPIO_H_START + (_nr))
109 #define S5P6450_GPI(_nr) (S5P6450_GPIO_I_START + (_nr))
110 #define S5P6450_GPJ(_nr) (S5P6450_GPIO_J_START + (_nr))
111 #define S5P6450_GPK(_nr) (S5P6450_GPIO_K_START + (_nr))
112 #define S5P6450_GPN(_nr) (S5P6450_GPIO_N_START + (_nr))
113 #define S5P6450_GPP(_nr) (S5P6450_GPIO_P_START + (_nr))
114 #define S5P6450_GPQ(_nr) (S5P6450_GPIO_Q_START + (_nr))
115 #define S5P6450_GPR(_nr) (S5P6450_GPIO_R_START + (_nr))
116 #define S5P6450_GPS(_nr) (S5P6450_GPIO_S_START + (_nr))
118 /* the end of the S5P64X0 specific gpios */
120 #define S5P6440_GPIO_END (S5P6440_GPR(S5P6440_GPIO_R_NR) + 1)
121 #define S5P6450_GPIO_END (S5P6450_GPS(S5P6450_GPIO_S_NR) + 1)
123 #define S5P64X0_GPIO_END (S5P6440_GPIO_END > S5P6450_GPIO_END ? \
124 S5P6440_GPIO_END : S5P6450_GPIO_END)
126 #define S3C_GPIO_END S5P64X0_GPIO_END
128 /* define the number of gpios we need to the one after the last GPIO range */
130 #define ARCH_NR_GPIOS (S5P64X0_GPIO_END + CONFIG_SAMSUNG_GPIO_EXTRA)
132 #endif /* __ASM_ARCH_GPIO_H */