spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / arm / mach-s5p64x0 / mach-smdk6450.c
blobefb69e2f2afe7a460b4a820f071b499eb7d33d32
1 /* linux/arch/arm/mach-s5p64x0/mach-smdk6450.c
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
11 #include <linux/kernel.h>
12 #include <linux/types.h>
13 #include <linux/interrupt.h>
14 #include <linux/list.h>
15 #include <linux/timer.h>
16 #include <linux/delay.h>
17 #include <linux/init.h>
18 #include <linux/i2c.h>
19 #include <linux/serial_core.h>
20 #include <linux/platform_device.h>
21 #include <linux/io.h>
22 #include <linux/module.h>
23 #include <linux/clk.h>
24 #include <linux/gpio.h>
25 #include <linux/pwm_backlight.h>
26 #include <linux/fb.h>
27 #include <linux/mmc/host.h>
29 #include <video/platform_lcd.h>
31 #include <asm/hardware/vic.h>
32 #include <asm/mach/arch.h>
33 #include <asm/mach/map.h>
34 #include <asm/irq.h>
35 #include <asm/mach-types.h>
37 #include <mach/hardware.h>
38 #include <mach/map.h>
39 #include <mach/regs-clock.h>
40 #include <mach/i2c.h>
41 #include <mach/regs-gpio.h>
43 #include <plat/regs-serial.h>
44 #include <plat/gpio-cfg.h>
45 #include <plat/clock.h>
46 #include <plat/devs.h>
47 #include <plat/cpu.h>
48 #include <plat/iic.h>
49 #include <plat/pll.h>
50 #include <plat/adc.h>
51 #include <plat/ts.h>
52 #include <plat/s5p-time.h>
53 #include <plat/backlight.h>
54 #include <plat/fb.h>
55 #include <plat/regs-fb.h>
56 #include <plat/sdhci.h>
58 #include "common.h"
60 #define SMDK6450_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
61 S3C2410_UCON_RXILEVEL | \
62 S3C2410_UCON_TXIRQMODE | \
63 S3C2410_UCON_RXIRQMODE | \
64 S3C2410_UCON_RXFIFO_TOI | \
65 S3C2443_UCON_RXERR_IRQEN)
67 #define SMDK6450_ULCON_DEFAULT S3C2410_LCON_CS8
69 #define SMDK6450_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
70 S3C2440_UFCON_TXTRIG16 | \
71 S3C2410_UFCON_RXTRIG8)
73 static struct s3c2410_uartcfg smdk6450_uartcfgs[] __initdata = {
74 [0] = {
75 .hwport = 0,
76 .flags = 0,
77 .ucon = SMDK6450_UCON_DEFAULT,
78 .ulcon = SMDK6450_ULCON_DEFAULT,
79 .ufcon = SMDK6450_UFCON_DEFAULT,
81 [1] = {
82 .hwport = 1,
83 .flags = 0,
84 .ucon = SMDK6450_UCON_DEFAULT,
85 .ulcon = SMDK6450_ULCON_DEFAULT,
86 .ufcon = SMDK6450_UFCON_DEFAULT,
88 [2] = {
89 .hwport = 2,
90 .flags = 0,
91 .ucon = SMDK6450_UCON_DEFAULT,
92 .ulcon = SMDK6450_ULCON_DEFAULT,
93 .ufcon = SMDK6450_UFCON_DEFAULT,
95 [3] = {
96 .hwport = 3,
97 .flags = 0,
98 .ucon = SMDK6450_UCON_DEFAULT,
99 .ulcon = SMDK6450_ULCON_DEFAULT,
100 .ufcon = SMDK6450_UFCON_DEFAULT,
102 #if CONFIG_SERIAL_SAMSUNG_UARTS > 4
103 [4] = {
104 .hwport = 4,
105 .flags = 0,
106 .ucon = SMDK6450_UCON_DEFAULT,
107 .ulcon = SMDK6450_ULCON_DEFAULT,
108 .ufcon = SMDK6450_UFCON_DEFAULT,
110 #endif
111 #if CONFIG_SERIAL_SAMSUNG_UARTS > 5
112 [5] = {
113 .hwport = 5,
114 .flags = 0,
115 .ucon = SMDK6450_UCON_DEFAULT,
116 .ulcon = SMDK6450_ULCON_DEFAULT,
117 .ufcon = SMDK6450_UFCON_DEFAULT,
119 #endif
122 /* Frame Buffer */
123 static struct s3c_fb_pd_win smdk6450_fb_win0 = {
124 .win_mode = {
125 .left_margin = 8,
126 .right_margin = 13,
127 .upper_margin = 7,
128 .lower_margin = 5,
129 .hsync_len = 3,
130 .vsync_len = 1,
131 .xres = 800,
132 .yres = 480,
134 .max_bpp = 32,
135 .default_bpp = 24,
138 static struct s3c_fb_platdata smdk6450_lcd_pdata __initdata = {
139 .win[0] = &smdk6450_fb_win0,
140 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
141 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
142 .setup_gpio = s5p64x0_fb_gpio_setup_24bpp,
145 /* LCD power controller */
146 static void smdk6450_lte480_reset_power(struct plat_lcd_data *pd,
147 unsigned int power)
149 int err;
151 if (power) {
152 err = gpio_request(S5P6450_GPN(5), "GPN");
153 if (err) {
154 printk(KERN_ERR "failed to request GPN for lcd reset\n");
155 return;
158 gpio_direction_output(S5P6450_GPN(5), 1);
159 gpio_set_value(S5P6450_GPN(5), 0);
160 gpio_set_value(S5P6450_GPN(5), 1);
161 gpio_free(S5P6450_GPN(5));
165 static struct plat_lcd_data smdk6450_lcd_power_data = {
166 .set_power = smdk6450_lte480_reset_power,
169 static struct platform_device smdk6450_lcd_lte480wv = {
170 .name = "platform-lcd",
171 .dev.parent = &s3c_device_fb.dev,
172 .dev.platform_data = &smdk6450_lcd_power_data,
175 static struct platform_device *smdk6450_devices[] __initdata = {
176 &s3c_device_adc,
177 &s3c_device_rtc,
178 &s3c_device_i2c0,
179 &s3c_device_i2c1,
180 &s3c_device_ts,
181 &s3c_device_wdt,
182 &samsung_asoc_dma,
183 &s5p6450_device_iis0,
184 &s3c_device_fb,
185 &smdk6450_lcd_lte480wv,
186 &s3c_device_hsmmc0,
187 &s3c_device_hsmmc1,
188 &s3c_device_hsmmc2,
189 /* s5p6450_device_spi0 will be added */
192 static struct s3c_sdhci_platdata smdk6450_hsmmc0_pdata __initdata = {
193 .cd_type = S3C_SDHCI_CD_NONE,
196 static struct s3c_sdhci_platdata smdk6450_hsmmc1_pdata __initdata = {
197 .cd_type = S3C_SDHCI_CD_NONE,
198 #if defined(CONFIG_S5P64X0_SD_CH1_8BIT)
199 .max_width = 8,
200 .host_caps = MMC_CAP_8_BIT_DATA,
201 #endif
204 static struct s3c_sdhci_platdata smdk6450_hsmmc2_pdata __initdata = {
205 .cd_type = S3C_SDHCI_CD_NONE,
208 static struct s3c2410_platform_i2c s5p6450_i2c0_data __initdata = {
209 .flags = 0,
210 .slave_addr = 0x10,
211 .frequency = 100*1000,
212 .sda_delay = 100,
213 .cfg_gpio = s5p6450_i2c0_cfg_gpio,
216 static struct s3c2410_platform_i2c s5p6450_i2c1_data __initdata = {
217 .flags = 0,
218 .bus_num = 1,
219 .slave_addr = 0x10,
220 .frequency = 100*1000,
221 .sda_delay = 100,
222 .cfg_gpio = s5p6450_i2c1_cfg_gpio,
225 static struct i2c_board_info smdk6450_i2c_devs0[] __initdata = {
226 { I2C_BOARD_INFO("wm8580", 0x1b), },
227 { I2C_BOARD_INFO("24c08", 0x50), }, /* Samsung KS24C080C EEPROM */
230 static struct i2c_board_info smdk6450_i2c_devs1[] __initdata = {
231 { I2C_BOARD_INFO("24c128", 0x57), },/* Samsung S524AD0XD1 EEPROM */
234 /* LCD Backlight data */
235 static struct samsung_bl_gpio_info smdk6450_bl_gpio_info = {
236 .no = S5P6450_GPF(15),
237 .func = S3C_GPIO_SFN(2),
240 static struct platform_pwm_backlight_data smdk6450_bl_data = {
241 .pwm_id = 1,
244 static void __init smdk6450_map_io(void)
246 s5p64x0_init_io(NULL, 0);
247 s3c24xx_init_clocks(19200000);
248 s3c24xx_init_uarts(smdk6450_uartcfgs, ARRAY_SIZE(smdk6450_uartcfgs));
249 s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
252 static void s5p6450_set_lcd_interface(void)
254 unsigned int cfg;
256 /* select TFT LCD type (RGB I/F) */
257 cfg = __raw_readl(S5P64X0_SPCON0);
258 cfg &= ~S5P64X0_SPCON0_LCD_SEL_MASK;
259 cfg |= S5P64X0_SPCON0_LCD_SEL_RGB;
260 __raw_writel(cfg, S5P64X0_SPCON0);
263 static void __init smdk6450_machine_init(void)
265 s3c24xx_ts_set_platdata(NULL);
267 s3c_i2c0_set_platdata(&s5p6450_i2c0_data);
268 s3c_i2c1_set_platdata(&s5p6450_i2c1_data);
269 i2c_register_board_info(0, smdk6450_i2c_devs0,
270 ARRAY_SIZE(smdk6450_i2c_devs0));
271 i2c_register_board_info(1, smdk6450_i2c_devs1,
272 ARRAY_SIZE(smdk6450_i2c_devs1));
274 samsung_bl_set(&smdk6450_bl_gpio_info, &smdk6450_bl_data);
276 s5p6450_set_lcd_interface();
277 s3c_fb_set_platdata(&smdk6450_lcd_pdata);
279 s3c_sdhci0_set_platdata(&smdk6450_hsmmc0_pdata);
280 s3c_sdhci1_set_platdata(&smdk6450_hsmmc1_pdata);
281 s3c_sdhci2_set_platdata(&smdk6450_hsmmc2_pdata);
283 platform_add_devices(smdk6450_devices, ARRAY_SIZE(smdk6450_devices));
286 MACHINE_START(SMDK6450, "SMDK6450")
287 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
288 .atag_offset = 0x100,
290 .init_irq = s5p6450_init_irq,
291 .handle_irq = vic_handle_irq,
292 .map_io = smdk6450_map_io,
293 .init_machine = smdk6450_machine_init,
294 .timer = &s5p_timer,
295 .restart = s5p64x0_restart,
296 MACHINE_END