spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / arm / mach-tegra / board-seaboard.c
blobebac65f52510d4c4eb65093ab0fa79210e83940a
1 /*
2 * Copyright (c) 2010, 2011 NVIDIA Corporation.
3 * Copyright (C) 2010, 2011 Google, Inc.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
17 #include <linux/kernel.h>
18 #include <linux/init.h>
19 #include <linux/platform_device.h>
20 #include <linux/serial_8250.h>
21 #include <linux/i2c.h>
22 #include <linux/delay.h>
23 #include <linux/input.h>
24 #include <linux/io.h>
25 #include <linux/gpio.h>
26 #include <linux/gpio_keys.h>
28 #include <sound/wm8903.h>
30 #include <mach/iomap.h>
31 #include <mach/irqs.h>
32 #include <mach/sdhci.h>
33 #include <mach/tegra_wm8903_pdata.h>
35 #include <asm/mach-types.h>
36 #include <asm/mach/arch.h>
37 #include <asm/hardware/gic.h>
39 #include "board.h"
40 #include "board-seaboard.h"
41 #include "clock.h"
42 #include "devices.h"
43 #include "gpio-names.h"
45 static struct plat_serial8250_port debug_uart_platform_data[] = {
47 /* Memory and IRQ filled in before registration */
48 .flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
49 .type = PORT_TEGRA,
50 .iotype = UPIO_MEM,
51 .regshift = 2,
52 .uartclk = 216000000,
53 }, {
54 .flags = 0,
58 static struct platform_device debug_uart = {
59 .name = "serial8250",
60 .id = PLAT8250_DEV_PLATFORM,
61 .dev = {
62 .platform_data = debug_uart_platform_data,
66 static __initdata struct tegra_clk_init_table seaboard_clk_init_table[] = {
67 /* name parent rate enabled */
68 { "uartb", "pll_p", 216000000, true},
69 { "uartd", "pll_p", 216000000, true},
70 { "pll_a", "pll_p_out1", 56448000, true },
71 { "pll_a_out0", "pll_a", 11289600, true },
72 { "cdev1", NULL, 0, true },
73 { "i2s1", "pll_a_out0", 11289600, false},
74 { "usbd", "clk_m", 12000000, true},
75 { "usb3", "clk_m", 12000000, true},
76 { NULL, NULL, 0, 0},
79 static struct gpio_keys_button seaboard_gpio_keys_buttons[] = {
81 .code = SW_LID,
82 .gpio = TEGRA_GPIO_LIDSWITCH,
83 .active_low = 0,
84 .desc = "Lid",
85 .type = EV_SW,
86 .wakeup = 1,
87 .debounce_interval = 1,
90 .code = KEY_POWER,
91 .gpio = TEGRA_GPIO_POWERKEY,
92 .active_low = 1,
93 .desc = "Power",
94 .type = EV_KEY,
95 .wakeup = 1,
99 static struct gpio_keys_platform_data seaboard_gpio_keys = {
100 .buttons = seaboard_gpio_keys_buttons,
101 .nbuttons = ARRAY_SIZE(seaboard_gpio_keys_buttons),
104 static struct platform_device seaboard_gpio_keys_device = {
105 .name = "gpio-keys",
106 .id = -1,
107 .dev = {
108 .platform_data = &seaboard_gpio_keys,
112 static struct tegra_sdhci_platform_data sdhci_pdata1 = {
113 .cd_gpio = -1,
114 .wp_gpio = -1,
115 .power_gpio = -1,
118 static struct tegra_sdhci_platform_data sdhci_pdata3 = {
119 .cd_gpio = TEGRA_GPIO_SD2_CD,
120 .wp_gpio = TEGRA_GPIO_SD2_WP,
121 .power_gpio = TEGRA_GPIO_SD2_POWER,
124 static struct tegra_sdhci_platform_data sdhci_pdata4 = {
125 .cd_gpio = -1,
126 .wp_gpio = -1,
127 .power_gpio = -1,
128 .is_8bit = 1,
131 static struct tegra_wm8903_platform_data seaboard_audio_pdata = {
132 .gpio_spkr_en = TEGRA_GPIO_SPKR_EN,
133 .gpio_hp_det = TEGRA_GPIO_HP_DET,
134 .gpio_hp_mute = -1,
135 .gpio_int_mic_en = -1,
136 .gpio_ext_mic_en = -1,
139 static struct platform_device seaboard_audio_device = {
140 .name = "tegra-snd-wm8903",
141 .id = 0,
142 .dev = {
143 .platform_data = &seaboard_audio_pdata,
147 static struct platform_device *seaboard_devices[] __initdata = {
148 &debug_uart,
149 &tegra_pmu_device,
150 &tegra_sdhci_device4,
151 &tegra_sdhci_device3,
152 &tegra_sdhci_device1,
153 &seaboard_gpio_keys_device,
154 &tegra_i2s_device1,
155 &tegra_das_device,
156 &tegra_pcm_device,
157 &seaboard_audio_device,
160 static struct i2c_board_info __initdata isl29018_device = {
161 I2C_BOARD_INFO("isl29018", 0x44),
162 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_ISL29018_IRQ),
165 static struct i2c_board_info __initdata adt7461_device = {
166 I2C_BOARD_INFO("adt7461", 0x4c),
169 static struct wm8903_platform_data wm8903_pdata = {
170 .irq_active_low = 0,
171 .micdet_cfg = 0,
172 .micdet_delay = 100,
173 .gpio_base = SEABOARD_GPIO_WM8903(0),
174 .gpio_cfg = {
177 WM8903_GPIO_CONFIG_ZERO,
183 static struct i2c_board_info __initdata wm8903_device = {
184 I2C_BOARD_INFO("wm8903", 0x1a),
185 .platform_data = &wm8903_pdata,
186 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_CDC_IRQ),
189 static int seaboard_ehci_init(void)
191 int gpio_status;
193 gpio_status = gpio_request(TEGRA_GPIO_USB1, "VBUS_USB1");
194 if (gpio_status < 0) {
195 pr_err("VBUS_USB1 request GPIO FAILED\n");
196 WARN_ON(1);
199 gpio_status = gpio_direction_output(TEGRA_GPIO_USB1, 1);
200 if (gpio_status < 0) {
201 pr_err("VBUS_USB1 request GPIO DIRECTION FAILED\n");
202 WARN_ON(1);
204 gpio_set_value(TEGRA_GPIO_USB1, 1);
206 platform_device_register(&tegra_ehci1_device);
207 platform_device_register(&tegra_ehci3_device);
209 return 0;
212 static void __init seaboard_i2c_init(void)
214 gpio_request(TEGRA_GPIO_ISL29018_IRQ, "isl29018");
215 gpio_direction_input(TEGRA_GPIO_ISL29018_IRQ);
217 i2c_register_board_info(0, &isl29018_device, 1);
218 i2c_register_board_info(0, &wm8903_device, 1);
220 i2c_register_board_info(3, &adt7461_device, 1);
222 platform_device_register(&tegra_i2c_device1);
223 platform_device_register(&tegra_i2c_device2);
224 platform_device_register(&tegra_i2c_device3);
225 platform_device_register(&tegra_i2c_device4);
228 static void __init seaboard_common_init(void)
230 seaboard_pinmux_init();
232 tegra_clk_init_from_table(seaboard_clk_init_table);
234 tegra_sdhci_device1.dev.platform_data = &sdhci_pdata1;
235 tegra_sdhci_device3.dev.platform_data = &sdhci_pdata3;
236 tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4;
238 platform_add_devices(seaboard_devices, ARRAY_SIZE(seaboard_devices));
240 seaboard_ehci_init();
243 static void __init tegra_seaboard_init(void)
245 /* Seaboard uses UARTD for the debug port. */
246 debug_uart_platform_data[0].membase = IO_ADDRESS(TEGRA_UARTD_BASE);
247 debug_uart_platform_data[0].mapbase = TEGRA_UARTD_BASE;
248 debug_uart_platform_data[0].irq = INT_UARTD;
250 seaboard_common_init();
252 seaboard_i2c_init();
255 static void __init tegra_kaen_init(void)
257 /* Kaen uses UARTB for the debug port. */
258 debug_uart_platform_data[0].membase = IO_ADDRESS(TEGRA_UARTB_BASE);
259 debug_uart_platform_data[0].mapbase = TEGRA_UARTB_BASE;
260 debug_uart_platform_data[0].irq = INT_UARTB;
262 seaboard_audio_pdata.gpio_hp_mute = TEGRA_GPIO_KAEN_HP_MUTE;
263 tegra_gpio_enable(TEGRA_GPIO_KAEN_HP_MUTE);
265 seaboard_common_init();
267 seaboard_i2c_init();
270 static void __init tegra_wario_init(void)
272 /* Wario uses UARTB for the debug port. */
273 debug_uart_platform_data[0].membase = IO_ADDRESS(TEGRA_UARTB_BASE);
274 debug_uart_platform_data[0].mapbase = TEGRA_UARTB_BASE;
275 debug_uart_platform_data[0].irq = INT_UARTB;
277 seaboard_common_init();
279 seaboard_i2c_init();
283 MACHINE_START(SEABOARD, "seaboard")
284 .atag_offset = 0x100,
285 .map_io = tegra_map_common_io,
286 .init_early = tegra20_init_early,
287 .init_irq = tegra_init_irq,
288 .handle_irq = gic_handle_irq,
289 .timer = &tegra_timer,
290 .init_machine = tegra_seaboard_init,
291 .restart = tegra_assert_system_reset,
292 MACHINE_END
294 MACHINE_START(KAEN, "kaen")
295 .atag_offset = 0x100,
296 .map_io = tegra_map_common_io,
297 .init_early = tegra20_init_early,
298 .init_irq = tegra_init_irq,
299 .handle_irq = gic_handle_irq,
300 .timer = &tegra_timer,
301 .init_machine = tegra_kaen_init,
302 .restart = tegra_assert_system_reset,
303 MACHINE_END
305 MACHINE_START(WARIO, "wario")
306 .atag_offset = 0x100,
307 .map_io = tegra_map_common_io,
308 .init_early = tegra20_init_early,
309 .init_irq = tegra_init_irq,
310 .handle_irq = gic_handle_irq,
311 .timer = &tegra_timer,
312 .init_machine = tegra_wario_init,
313 .restart = tegra_assert_system_reset,
314 MACHINE_END