spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / arm / mach-tegra / board-trimslice.c
blobcd52820a3e37a08090080e81f67df568018c9c06
1 /*
2 * arch/arm/mach-tegra/board-trimslice.c
4 * Copyright (C) 2011 CompuLab, Ltd.
5 * Author: Mike Rapoport <mike@compulab.co.il>
7 * Based on board-harmony.c
8 * Copyright (C) 2010 Google, Inc.
10 * This software is licensed under the terms of the GNU General Public
11 * License version 2, as published by the Free Software Foundation, and
12 * may be copied, distributed, and modified under those terms.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/platform_device.h>
24 #include <linux/serial_8250.h>
25 #include <linux/io.h>
26 #include <linux/i2c.h>
27 #include <linux/gpio.h>
29 #include <asm/hardware/gic.h>
30 #include <asm/mach-types.h>
31 #include <asm/mach/arch.h>
32 #include <asm/setup.h>
34 #include <mach/iomap.h>
35 #include <mach/sdhci.h>
37 #include "board.h"
38 #include "clock.h"
39 #include "devices.h"
40 #include "gpio-names.h"
42 #include "board-trimslice.h"
44 static struct plat_serial8250_port debug_uart_platform_data[] = {
46 .membase = IO_ADDRESS(TEGRA_UARTA_BASE),
47 .mapbase = TEGRA_UARTA_BASE,
48 .irq = INT_UARTA,
49 .flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
50 .type = PORT_TEGRA,
51 .iotype = UPIO_MEM,
52 .regshift = 2,
53 .uartclk = 216000000,
54 }, {
55 .flags = 0
59 static struct platform_device debug_uart = {
60 .name = "serial8250",
61 .id = PLAT8250_DEV_PLATFORM,
62 .dev = {
63 .platform_data = debug_uart_platform_data,
66 static struct tegra_sdhci_platform_data sdhci_pdata1 = {
67 .cd_gpio = -1,
68 .wp_gpio = -1,
69 .power_gpio = -1,
72 static struct tegra_sdhci_platform_data sdhci_pdata4 = {
73 .cd_gpio = TRIMSLICE_GPIO_SD4_CD,
74 .wp_gpio = TRIMSLICE_GPIO_SD4_WP,
75 .power_gpio = -1,
78 static struct platform_device trimslice_audio_device = {
79 .name = "tegra-snd-trimslice",
80 .id = 0,
83 static struct platform_device *trimslice_devices[] __initdata = {
84 &debug_uart,
85 &tegra_sdhci_device1,
86 &tegra_sdhci_device4,
87 &tegra_i2s_device1,
88 &tegra_das_device,
89 &tegra_pcm_device,
90 &trimslice_audio_device,
93 static struct i2c_board_info trimslice_i2c3_board_info[] = {
95 I2C_BOARD_INFO("tlv320aic23", 0x1a),
98 I2C_BOARD_INFO("em3027", 0x56),
102 static void trimslice_i2c_init(void)
104 platform_device_register(&tegra_i2c_device1);
105 platform_device_register(&tegra_i2c_device2);
106 platform_device_register(&tegra_i2c_device3);
108 i2c_register_board_info(2, trimslice_i2c3_board_info,
109 ARRAY_SIZE(trimslice_i2c3_board_info));
112 static void trimslice_usb_init(void)
114 int err;
116 platform_device_register(&tegra_ehci3_device);
118 platform_device_register(&tegra_ehci2_device);
120 err = gpio_request_one(TRIMSLICE_GPIO_USB1_MODE, GPIOF_OUT_INIT_HIGH,
121 "usb1mode");
122 if (err) {
123 pr_err("TrimSlice: failed to obtain USB1 mode gpio: %d\n", err);
124 return;
127 platform_device_register(&tegra_ehci1_device);
130 static void __init tegra_trimslice_fixup(struct tag *tags, char **cmdline,
131 struct meminfo *mi)
133 mi->nr_banks = 2;
134 mi->bank[0].start = PHYS_OFFSET;
135 mi->bank[0].size = 448 * SZ_1M;
136 mi->bank[1].start = SZ_512M;
137 mi->bank[1].size = SZ_512M;
140 static __initdata struct tegra_clk_init_table trimslice_clk_init_table[] = {
141 /* name parent rate enabled */
142 { "uarta", "pll_p", 216000000, true },
143 { "pll_a", "pll_p_out1", 56448000, true },
144 { "pll_a_out0", "pll_a", 11289600, true },
145 { "cdev1", NULL, 0, true },
146 { "i2s1", "pll_a_out0", 11289600, false},
147 { NULL, NULL, 0, 0},
150 static int __init tegra_trimslice_pci_init(void)
152 if (!machine_is_trimslice())
153 return 0;
155 return tegra_pcie_init(true, true);
157 subsys_initcall(tegra_trimslice_pci_init);
159 static void __init tegra_trimslice_init(void)
161 tegra_clk_init_from_table(trimslice_clk_init_table);
163 trimslice_pinmux_init();
165 tegra_sdhci_device1.dev.platform_data = &sdhci_pdata1;
166 tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4;
168 platform_add_devices(trimslice_devices, ARRAY_SIZE(trimslice_devices));
170 trimslice_i2c_init();
171 trimslice_usb_init();
174 MACHINE_START(TRIMSLICE, "trimslice")
175 .atag_offset = 0x100,
176 .fixup = tegra_trimslice_fixup,
177 .map_io = tegra_map_common_io,
178 .init_early = tegra20_init_early,
179 .init_irq = tegra_init_irq,
180 .handle_irq = gic_handle_irq,
181 .timer = &tegra_timer,
182 .init_machine = tegra_trimslice_init,
183 .restart = tegra_assert_system_reset,
184 MACHINE_END