spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / arm / mach-ux500 / cpu-db5500.c
blob18aa5c05c69ec1f42dd29ee1cd6ba42d890cb2c7
1 /*
2 * Copyright (C) ST-Ericsson SA 2010
4 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
5 * License terms: GNU General Public License (GPL) version 2
6 */
8 #include <linux/platform_device.h>
9 #include <linux/amba/bus.h>
10 #include <linux/io.h>
11 #include <linux/irq.h>
13 #include <asm/mach/map.h>
14 #include <asm/pmu.h>
16 #include <plat/gpio-nomadik.h>
18 #include <mach/hardware.h>
19 #include <mach/devices.h>
20 #include <mach/setup.h>
21 #include <mach/irqs.h>
22 #include <mach/usb.h>
24 #include "devices-db5500.h"
25 #include "ste-dma40-db5500.h"
27 static struct map_desc u5500_uart_io_desc[] __initdata = {
28 __IO_DEV_DESC(U5500_UART0_BASE, SZ_4K),
29 __IO_DEV_DESC(U5500_UART2_BASE, SZ_4K),
32 static struct map_desc u5500_io_desc[] __initdata = {
33 /* SCU base also covers GIC CPU BASE and TWD with its 4K page */
34 __IO_DEV_DESC(U5500_SCU_BASE, SZ_4K),
35 __IO_DEV_DESC(U5500_GIC_DIST_BASE, SZ_4K),
36 __IO_DEV_DESC(U5500_L2CC_BASE, SZ_4K),
37 __IO_DEV_DESC(U5500_MTU0_BASE, SZ_4K),
38 __IO_DEV_DESC(U5500_BACKUPRAM0_BASE, SZ_8K),
40 __IO_DEV_DESC(U5500_GPIO0_BASE, SZ_4K),
41 __IO_DEV_DESC(U5500_GPIO1_BASE, SZ_4K),
42 __IO_DEV_DESC(U5500_GPIO2_BASE, SZ_4K),
43 __IO_DEV_DESC(U5500_GPIO3_BASE, SZ_4K),
44 __IO_DEV_DESC(U5500_GPIO4_BASE, SZ_4K),
45 __IO_DEV_DESC(U5500_PRCMU_BASE, SZ_4K),
46 __IO_DEV_DESC(U5500_PRCMU_TCDM_BASE, SZ_4K),
49 static struct resource mbox0_resources[] = {
51 .name = "mbox_peer",
52 .start = U5500_MBOX0_PEER_START,
53 .end = U5500_MBOX0_PEER_END,
54 .flags = IORESOURCE_MEM,
57 .name = "mbox_local",
58 .start = U5500_MBOX0_LOCAL_START,
59 .end = U5500_MBOX0_LOCAL_END,
60 .flags = IORESOURCE_MEM,
63 .name = "mbox_irq",
64 .start = MBOX_PAIR0_VIRT_IRQ,
65 .end = MBOX_PAIR0_VIRT_IRQ,
66 .flags = IORESOURCE_IRQ,
70 static struct resource mbox1_resources[] = {
72 .name = "mbox_peer",
73 .start = U5500_MBOX1_PEER_START,
74 .end = U5500_MBOX1_PEER_END,
75 .flags = IORESOURCE_MEM,
78 .name = "mbox_local",
79 .start = U5500_MBOX1_LOCAL_START,
80 .end = U5500_MBOX1_LOCAL_END,
81 .flags = IORESOURCE_MEM,
84 .name = "mbox_irq",
85 .start = MBOX_PAIR1_VIRT_IRQ,
86 .end = MBOX_PAIR1_VIRT_IRQ,
87 .flags = IORESOURCE_IRQ,
91 static struct resource mbox2_resources[] = {
93 .name = "mbox_peer",
94 .start = U5500_MBOX2_PEER_START,
95 .end = U5500_MBOX2_PEER_END,
96 .flags = IORESOURCE_MEM,
99 .name = "mbox_local",
100 .start = U5500_MBOX2_LOCAL_START,
101 .end = U5500_MBOX2_LOCAL_END,
102 .flags = IORESOURCE_MEM,
105 .name = "mbox_irq",
106 .start = MBOX_PAIR2_VIRT_IRQ,
107 .end = MBOX_PAIR2_VIRT_IRQ,
108 .flags = IORESOURCE_IRQ,
112 static struct platform_device mbox0_device = {
113 .id = 0,
114 .name = "mbox",
115 .resource = mbox0_resources,
116 .num_resources = ARRAY_SIZE(mbox0_resources),
119 static struct platform_device mbox1_device = {
120 .id = 1,
121 .name = "mbox",
122 .resource = mbox1_resources,
123 .num_resources = ARRAY_SIZE(mbox1_resources),
126 static struct platform_device mbox2_device = {
127 .id = 2,
128 .name = "mbox",
129 .resource = mbox2_resources,
130 .num_resources = ARRAY_SIZE(mbox2_resources),
133 static struct platform_device *db5500_platform_devs[] __initdata = {
134 &mbox0_device,
135 &mbox1_device,
136 &mbox2_device,
139 static resource_size_t __initdata db5500_gpio_base[] = {
140 U5500_GPIOBANK0_BASE,
141 U5500_GPIOBANK1_BASE,
142 U5500_GPIOBANK2_BASE,
143 U5500_GPIOBANK3_BASE,
144 U5500_GPIOBANK4_BASE,
145 U5500_GPIOBANK5_BASE,
146 U5500_GPIOBANK6_BASE,
147 U5500_GPIOBANK7_BASE,
150 static void __init db5500_add_gpios(void)
152 struct nmk_gpio_platform_data pdata = {
153 /* No custom data yet */
156 dbx500_add_gpios(ARRAY_AND_SIZE(db5500_gpio_base),
157 IRQ_DB5500_GPIO0, &pdata);
160 void __init u5500_map_io(void)
163 * Map the UARTs early so that the DEBUG_LL stuff continues to work.
165 iotable_init(u5500_uart_io_desc, ARRAY_SIZE(u5500_uart_io_desc));
167 ux500_map_io();
169 iotable_init(u5500_io_desc, ARRAY_SIZE(u5500_io_desc));
171 _PRCMU_BASE = __io_address(U5500_PRCMU_BASE);
174 static void __init db5500_pmu_init(void)
176 struct resource res[] = {
177 [0] = {
178 .start = IRQ_DB5500_PMU0,
179 .end = IRQ_DB5500_PMU0,
180 .flags = IORESOURCE_IRQ,
182 [1] = {
183 .start = IRQ_DB5500_PMU1,
184 .end = IRQ_DB5500_PMU1,
185 .flags = IORESOURCE_IRQ,
189 platform_device_register_simple("arm-pmu", ARM_PMU_DEVICE_CPU,
190 res, ARRAY_SIZE(res));
193 static int usb_db5500_rx_dma_cfg[] = {
194 DB5500_DMA_DEV4_USB_OTG_IEP_1_9,
195 DB5500_DMA_DEV5_USB_OTG_IEP_2_10,
196 DB5500_DMA_DEV6_USB_OTG_IEP_3_11,
197 DB5500_DMA_DEV20_USB_OTG_IEP_4_12,
198 DB5500_DMA_DEV21_USB_OTG_IEP_5_13,
199 DB5500_DMA_DEV22_USB_OTG_IEP_6_14,
200 DB5500_DMA_DEV23_USB_OTG_IEP_7_15,
201 DB5500_DMA_DEV38_USB_OTG_IEP_8
204 static int usb_db5500_tx_dma_cfg[] = {
205 DB5500_DMA_DEV4_USB_OTG_OEP_1_9,
206 DB5500_DMA_DEV5_USB_OTG_OEP_2_10,
207 DB5500_DMA_DEV6_USB_OTG_OEP_3_11,
208 DB5500_DMA_DEV20_USB_OTG_OEP_4_12,
209 DB5500_DMA_DEV21_USB_OTG_OEP_5_13,
210 DB5500_DMA_DEV22_USB_OTG_OEP_6_14,
211 DB5500_DMA_DEV23_USB_OTG_OEP_7_15,
212 DB5500_DMA_DEV38_USB_OTG_OEP_8
215 void __init u5500_init_devices(void)
217 db5500_add_gpios();
218 db5500_pmu_init();
219 db5500_dma_init();
220 db5500_add_rtc();
221 db5500_add_usb(usb_db5500_rx_dma_cfg, usb_db5500_tx_dma_cfg);
223 platform_add_devices(db5500_platform_devs,
224 ARRAY_SIZE(db5500_platform_devs));