spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / arm / mach-ux500 / id.c
blob15a0f63b2e2bace8f8c82797f0ba1ae6483da4e1
1 /*
2 * Copyright (C) ST-Ericsson SA 2010
4 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
5 * License terms: GNU General Public License (GPL) version 2
6 */
8 #include <linux/kernel.h>
9 #include <linux/init.h>
10 #include <linux/io.h>
12 #include <asm/cputype.h>
13 #include <asm/tlbflush.h>
14 #include <asm/cacheflush.h>
15 #include <asm/mach/map.h>
17 #include <mach/hardware.h>
18 #include <mach/setup.h>
20 struct dbx500_asic_id dbx500_id;
22 static unsigned int ux500_read_asicid(phys_addr_t addr)
24 phys_addr_t base = addr & ~0xfff;
25 struct map_desc desc = {
26 .virtual = IO_ADDRESS(base),
27 .pfn = __phys_to_pfn(base),
28 .length = SZ_16K,
29 .type = MT_DEVICE,
32 iotable_init(&desc, 1);
34 /* As in devicemaps_init() */
35 local_flush_tlb_all();
36 flush_cache_all();
38 return readl(__io_address(addr));
41 static void ux500_print_soc_info(unsigned int asicid)
43 unsigned int rev = dbx500_revision();
45 pr_info("DB%4x ", dbx500_partnumber());
47 if (rev == 0x01)
48 pr_cont("Early Drop");
49 else if (rev >= 0xA0)
50 pr_cont("v%d.%d" , (rev >> 4) - 0xA + 1, rev & 0xf);
51 else
52 pr_cont("Unknown");
54 pr_cont(" [%#010x]\n", asicid);
57 static unsigned int partnumber(unsigned int asicid)
59 return (asicid >> 8) & 0xffff;
63 * SOC MIDR ASICID ADDRESS ASICID VALUE
64 * DB8500ed 0x410fc090 0x9001FFF4 0x00850001
65 * DB8500v1 0x411fc091 0x9001FFF4 0x008500A0
66 * DB8500v1.1 0x411fc091 0x9001FFF4 0x008500A1
67 * DB8500v2 0x412fc091 0x9001DBF4 0x008500B0
68 * DB8520v2.2 0x412fc091 0x9001DBF4 0x008500B2
69 * DB5500v1 0x412fc091 0x9001FFF4 0x005500A0
72 void __init ux500_map_io(void)
74 unsigned int cpuid = read_cpuid_id();
75 unsigned int asicid = 0;
76 phys_addr_t addr = 0;
78 switch (cpuid) {
79 case 0x410fc090: /* DB8500ed */
80 case 0x411fc091: /* DB8500v1 */
81 addr = 0x9001FFF4;
82 break;
84 case 0x412fc091: /* DB8520 / DB8500v2 / DB5500v1 */
85 asicid = ux500_read_asicid(0x9001DBF4);
86 if (partnumber(asicid) == 0x8500 ||
87 partnumber(asicid) == 0x8520)
88 /* DB8500v2 */
89 break;
91 /* DB5500v1 */
92 addr = 0x9001FFF4;
93 break;
96 if (addr)
97 asicid = ux500_read_asicid(addr);
99 if (!asicid) {
100 pr_err("Unable to identify SoC\n");
101 ux500_unknown_soc();
104 dbx500_id.process = asicid >> 24;
105 dbx500_id.partnumber = partnumber(asicid);
106 dbx500_id.revision = asicid & 0xff;
108 ux500_print_soc_info(asicid);