spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / arm / mach-w90x900 / include / mach / irqs.h
blob9d5cba3a509fa3a0c1fe01f55e4fa4718bd2455c
1 /*
2 * arch/arm/mach-w90x900/include/mach/irqs.h
4 * Copyright (c) 2008 Nuvoton technology corporation.
6 * Wan ZongShun <mcuos.com@gmail.com>
8 * Based on arch/arm/mach-s3c2410/include/mach/irqs.h
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation;version 2 of the License.
16 #ifndef __ASM_ARCH_IRQS_H
17 #define __ASM_ARCH_IRQS_H
20 * we keep the first set of CPU IRQs out of the range of
21 * the ISA space, so that the PC104 has them to itself
22 * and we don't end up having to do horrible things to the
23 * standard ISA drivers....
27 #define W90X900_IRQ(x) (x)
29 /* Main cpu interrupts */
31 #define IRQ_WDT W90X900_IRQ(1)
32 #define IRQ_GROUP0 W90X900_IRQ(2)
33 #define IRQ_GROUP1 W90X900_IRQ(3)
34 #define IRQ_ACTL W90X900_IRQ(4)
35 #define IRQ_LCD W90X900_IRQ(5)
36 #define IRQ_RTC W90X900_IRQ(6)
37 #define IRQ_UART0 W90X900_IRQ(7)
38 #define IRQ_UART1 W90X900_IRQ(8)
39 #define IRQ_UART2 W90X900_IRQ(9)
40 #define IRQ_UART3 W90X900_IRQ(10)
41 #define IRQ_UART4 W90X900_IRQ(11)
42 #define IRQ_TIMER0 W90X900_IRQ(12)
43 #define IRQ_TIMER1 W90X900_IRQ(13)
44 #define IRQ_T_INT_GROUP W90X900_IRQ(14)
45 #define IRQ_USBH W90X900_IRQ(15)
46 #define IRQ_EMCTX W90X900_IRQ(16)
47 #define IRQ_EMCRX W90X900_IRQ(17)
48 #define IRQ_GDMAGROUP W90X900_IRQ(18)
49 #define IRQ_DMAC W90X900_IRQ(19)
50 #define IRQ_FMI W90X900_IRQ(20)
51 #define IRQ_USBD W90X900_IRQ(21)
52 #define IRQ_ATAPI W90X900_IRQ(22)
53 #define IRQ_G2D W90X900_IRQ(23)
54 #define IRQ_PCI W90X900_IRQ(24)
55 #define IRQ_SCGROUP W90X900_IRQ(25)
56 #define IRQ_I2CGROUP W90X900_IRQ(26)
57 #define IRQ_SSP W90X900_IRQ(27)
58 #define IRQ_PWM W90X900_IRQ(28)
59 #define IRQ_KPI W90X900_IRQ(29)
60 #define IRQ_P2SGROUP W90X900_IRQ(30)
61 #define IRQ_ADC W90X900_IRQ(31)
62 #define NR_IRQS (IRQ_ADC+1)
64 /*for irq group*/
66 #define IRQ_PS2_PORT0 0x10000000
67 #define IRQ_PS2_PORT1 0x20000000
68 #define IRQ_I2C_LINE0 0x04000000
69 #define IRQ_I2C_LINE1 0x08000000
70 #define IRQ_SC_CARD0 0x01000000
71 #define IRQ_SC_CARD1 0x02000000
72 #define IRQ_GDMA_CH0 0x00100000
73 #define IRQ_GDMA_CH1 0x00200000
74 #define IRQ_TIMER2 0x00010000
75 #define IRQ_TIMER3 0x00020000
76 #define IRQ_TIMER4 0x00040000
77 #define IRQ_GROUP0_IRQ0 0x00000001
78 #define IRQ_GROUP0_IRQ1 0x00000002
79 #define IRQ_GROUP0_IRQ2 0x00000004
80 #define IRQ_GROUP0_IRQ3 0x00000008
81 #define IRQ_GROUP1_IRQ4 0x00000010
82 #define IRQ_GROUP1_IRQ5 0x00000020
83 #define IRQ_GROUP1_IRQ6 0x00000040
84 #define IRQ_GROUP1_IRQ7 0x00000080
86 #endif /* __ASM_ARCH_IRQ_H */