spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / arm / plat-mxc / include / mach / audmux.h
blob6fda788ed0e96eb01e49843e800fb546e1f43e36
1 #ifndef __MACH_AUDMUX_H
2 #define __MACH_AUDMUX_H
4 #define MX27_AUDMUX_HPCR1_SSI0 0
5 #define MX27_AUDMUX_HPCR2_SSI1 1
6 #define MX27_AUDMUX_HPCR3_SSI_PINS_4 2
7 #define MX27_AUDMUX_PPCR1_SSI_PINS_1 3
8 #define MX27_AUDMUX_PPCR2_SSI_PINS_2 4
9 #define MX27_AUDMUX_PPCR3_SSI_PINS_3 5
11 #define MX31_AUDMUX_PORT1_SSI0 0
12 #define MX31_AUDMUX_PORT2_SSI1 1
13 #define MX31_AUDMUX_PORT3_SSI_PINS_3 2
14 #define MX31_AUDMUX_PORT4_SSI_PINS_4 3
15 #define MX31_AUDMUX_PORT5_SSI_PINS_5 4
16 #define MX31_AUDMUX_PORT6_SSI_PINS_6 5
18 #define MX51_AUDMUX_PORT1_SSI0 0
19 #define MX51_AUDMUX_PORT2_SSI1 1
20 #define MX51_AUDMUX_PORT3 2
21 #define MX51_AUDMUX_PORT4 3
22 #define MX51_AUDMUX_PORT5 4
23 #define MX51_AUDMUX_PORT6 5
24 #define MX51_AUDMUX_PORT7 6
26 /* Register definitions for the i.MX21/27 Digital Audio Multiplexer */
27 #define MXC_AUDMUX_V1_PCR_INMMASK(x) ((x) & 0xff)
28 #define MXC_AUDMUX_V1_PCR_INMEN (1 << 8)
29 #define MXC_AUDMUX_V1_PCR_TXRXEN (1 << 10)
30 #define MXC_AUDMUX_V1_PCR_SYN (1 << 12)
31 #define MXC_AUDMUX_V1_PCR_RXDSEL(x) (((x) & 0x7) << 13)
32 #define MXC_AUDMUX_V1_PCR_RFCSEL(x) (((x) & 0xf) << 20)
33 #define MXC_AUDMUX_V1_PCR_RCLKDIR (1 << 24)
34 #define MXC_AUDMUX_V1_PCR_RFSDIR (1 << 25)
35 #define MXC_AUDMUX_V1_PCR_TFCSEL(x) (((x) & 0xf) << 26)
36 #define MXC_AUDMUX_V1_PCR_TCLKDIR (1 << 30)
37 #define MXC_AUDMUX_V1_PCR_TFSDIR (1 << 31)
39 /* Register definitions for the i.MX25/31/35/51 Digital Audio Multiplexer */
40 #define MXC_AUDMUX_V2_PTCR_TFSDIR (1 << 31)
41 #define MXC_AUDMUX_V2_PTCR_TFSEL(x) (((x) & 0xf) << 27)
42 #define MXC_AUDMUX_V2_PTCR_TCLKDIR (1 << 26)
43 #define MXC_AUDMUX_V2_PTCR_TCSEL(x) (((x) & 0xf) << 22)
44 #define MXC_AUDMUX_V2_PTCR_RFSDIR (1 << 21)
45 #define MXC_AUDMUX_V2_PTCR_RFSEL(x) (((x) & 0xf) << 17)
46 #define MXC_AUDMUX_V2_PTCR_RCLKDIR (1 << 16)
47 #define MXC_AUDMUX_V2_PTCR_RCSEL(x) (((x) & 0xf) << 12)
48 #define MXC_AUDMUX_V2_PTCR_SYN (1 << 11)
50 #define MXC_AUDMUX_V2_PDCR_RXDSEL(x) (((x) & 0x7) << 13)
51 #define MXC_AUDMUX_V2_PDCR_TXRXEN (1 << 12)
52 #define MXC_AUDMUX_V2_PDCR_MODE(x) (((x) & 0x3) << 8)
53 #define MXC_AUDMUX_V2_PDCR_INMMASK(x) ((x) & 0xff)
55 int mxc_audmux_v1_configure_port(unsigned int port, unsigned int pcr);
57 int mxc_audmux_v2_configure_port(unsigned int port, unsigned int ptcr,
58 unsigned int pdcr);
60 #endif /* __MACH_AUDMUX_H */