spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / arm / plat-mxc / include / mach / mx6q.h
blob254a561a2799aa2dee8b4a0d2461a80fb8199f2c
1 /*
2 * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.
3 * Copyright 2011 Linaro Ltd.
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
13 #ifndef __MACH_MX6Q_H__
14 #define __MACH_MX6Q_H__
16 #define MX6Q_IO_P2V(x) IMX_IO_P2V(x)
17 #define MX6Q_IO_ADDRESS(x) IOMEM(MX6Q_IO_P2V(x))
20 * The following are the blocks that need to be statically mapped.
21 * For other blocks, the base address really should be retrieved from
22 * device tree.
24 #define MX6Q_SCU_BASE_ADDR 0x00a00000
25 #define MX6Q_SCU_SIZE 0x1000
26 #define MX6Q_CCM_BASE_ADDR 0x020c4000
27 #define MX6Q_CCM_SIZE 0x4000
28 #define MX6Q_ANATOP_BASE_ADDR 0x020c8000
29 #define MX6Q_ANATOP_SIZE 0x1000
30 #define MX6Q_UART4_BASE_ADDR 0x021f0000
31 #define MX6Q_UART4_SIZE 0x4000
33 #endif /* __MACH_MX6Q_H__ */