arch/arm/plat-mxc/include/mach/mxc.h

   1 /*
   2  * Copyright 2004-2007, 2010 Freescale Semiconductor, Inc. All Rights Reserved.
   3  * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License
   7  * as published by the Free Software Foundation; either version 2
   8  * of the License, or (at your option) any later version.
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software
  16  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  17  * MA 02110-1301, USA.
  18  */
  19
  20 #ifndef __ASM_ARCH_MXC_H__
  21 #define __ASM_ARCH_MXC_H__
  22
  23 #include <linux/types.h>
  24
  25 #ifndef __ASM_ARCH_MXC_HARDWARE_H__
  26 #error "Do not include directly."
  27 #endif
  28
  29 #define MXC_CPU_MX1             1
  30 #define MXC_CPU_MX21            21
  31 #define MXC_CPU_MX25            25
  32 #define MXC_CPU_MX27            27
  33 #define MXC_CPU_MX31            31
  34 #define MXC_CPU_MX35            35
  35 #define MXC_CPU_MX50            50
  36 #define MXC_CPU_MX51            51
  37 #define MXC_CPU_MX53            53
  38
  39 #define IMX_CHIP_REVISION_1_0           0x10
  40 #define IMX_CHIP_REVISION_1_1           0x11
  41 #define IMX_CHIP_REVISION_1_2           0x12
  42 #define IMX_CHIP_REVISION_1_3           0x13
  43 #define IMX_CHIP_REVISION_2_0           0x20
  44 #define IMX_CHIP_REVISION_2_1           0x21
  45 #define IMX_CHIP_REVISION_2_2           0x22
  46 #define IMX_CHIP_REVISION_2_3           0x23
  47 #define IMX_CHIP_REVISION_3_0           0x30
  48 #define IMX_CHIP_REVISION_3_1           0x31
  49 #define IMX_CHIP_REVISION_3_2           0x32
  50 #define IMX_CHIP_REVISION_3_3           0x33
  51 #define IMX_CHIP_REVISION_UNKNOWN       0xff
  52
  53 #ifndef __ASSEMBLY__
  54 extern unsigned int __mxc_cpu_type;
  55 #endif
  56
  57 #ifdef CONFIG_SOC_IMX1
  58 # ifdef mxc_cpu_type
  59 #  undef mxc_cpu_type
  60 #  define mxc_cpu_type __mxc_cpu_type
  61 # else
  62 #  define mxc_cpu_type MXC_CPU_MX1
  63 # endif
  64 # define cpu_is_mx1()           (mxc_cpu_type == MXC_CPU_MX1)
  65 #else
  66 # define cpu_is_mx1()           (0)
  67 #endif
  68
  69 #ifdef CONFIG_SOC_IMX21
  70 # ifdef mxc_cpu_type
  71 #  undef mxc_cpu_type
  72 #  define mxc_cpu_type __mxc_cpu_type
  73 # else
  74 #  define mxc_cpu_type MXC_CPU_MX21
  75 # endif
  76 # define cpu_is_mx21()          (mxc_cpu_type == MXC_CPU_MX21)
  77 #else
  78 # define cpu_is_mx21()          (0)
  79 #endif
  80
  81 #ifdef CONFIG_SOC_IMX25
  82 # ifdef mxc_cpu_type
  83 #  undef mxc_cpu_type
  84 #  define mxc_cpu_type __mxc_cpu_type
  85 # else
  86 #  define mxc_cpu_type MXC_CPU_MX25
  87 # endif
  88 # define cpu_is_mx25()          (mxc_cpu_type == MXC_CPU_MX25)
  89 #else
  90 # define cpu_is_mx25()          (0)
  91 #endif
  92
  93 #ifdef CONFIG_SOC_IMX27
  94 # ifdef mxc_cpu_type
  95 #  undef mxc_cpu_type
  96 #  define mxc_cpu_type __mxc_cpu_type
  97 # else
  98 #  define mxc_cpu_type MXC_CPU_MX27
  99 # endif
 100 # define cpu_is_mx27()          (mxc_cpu_type == MXC_CPU_MX27)
 101 #else
 102 # define cpu_is_mx27()          (0)
 103 #endif
 104
 105 #ifdef CONFIG_SOC_IMX31
 106 # ifdef mxc_cpu_type
 107 #  undef mxc_cpu_type
 108 #  define mxc_cpu_type __mxc_cpu_type
 109 # else
 110 #  define mxc_cpu_type MXC_CPU_MX31
 111 # endif
 112 # define cpu_is_mx31()          (mxc_cpu_type == MXC_CPU_MX31)
 113 #else
 114 # define cpu_is_mx31()          (0)
 115 #endif
 116
 117 #ifdef CONFIG_SOC_IMX35
 118 # ifdef mxc_cpu_type
 119 #  undef mxc_cpu_type
 120 #  define mxc_cpu_type __mxc_cpu_type
 121 # else
 122 #  define mxc_cpu_type MXC_CPU_MX35
 123 # endif
 124 # define cpu_is_mx35()          (mxc_cpu_type == MXC_CPU_MX35)
 125 #else
 126 # define cpu_is_mx35()          (0)
 127 #endif
 128
 129 #ifdef CONFIG_SOC_IMX50
 130 # ifdef mxc_cpu_type
 131 #  undef mxc_cpu_type
 132 #  define mxc_cpu_type __mxc_cpu_type
 133 # else
 134 #  define mxc_cpu_type MXC_CPU_MX50
 135 # endif
 136 # define cpu_is_mx50()          (mxc_cpu_type == MXC_CPU_MX50)
 137 #else
 138 # define cpu_is_mx50()          (0)
 139 #endif
 140
 141 #ifdef CONFIG_SOC_IMX51
 142 # ifdef mxc_cpu_type
 143 #  undef mxc_cpu_type
 144 #  define mxc_cpu_type __mxc_cpu_type
 145 # else
 146 #  define mxc_cpu_type MXC_CPU_MX51
 147 # endif
 148 # define cpu_is_mx51()          (mxc_cpu_type == MXC_CPU_MX51)
 149 #else
 150 # define cpu_is_mx51()          (0)
 151 #endif
 152
 153 #ifdef CONFIG_SOC_IMX53
 154 # ifdef mxc_cpu_type
 155 #  undef mxc_cpu_type
 156 #  define mxc_cpu_type __mxc_cpu_type
 157 # else
 158 #  define mxc_cpu_type MXC_CPU_MX53
 159 # endif
 160 # define cpu_is_mx53()          (mxc_cpu_type == MXC_CPU_MX53)
 161 #else
 162 # define cpu_is_mx53()          (0)
 163 #endif
 164
 165 #ifndef __ASSEMBLY__
 166
 167 struct cpu_op {
 168         u32 cpu_rate;
 169 };
 170
 171 int tzic_enable_wake(void);
 172
 173 extern struct cpu_op *(*get_cpu_op)(int *op);
 174 #endif
 175
 176 #define cpu_is_mx3()    (cpu_is_mx31() || cpu_is_mx35())
 177 #define cpu_is_mx2()    (cpu_is_mx21() || cpu_is_mx27())
 178
 179 #endif /*  __ASM_ARCH_MXC_H__ */