spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / arm / plat-mxc / iomux-v1.c
blob1f73963bc13e916e895433ffd5e5d7687e9e333d
1 /*
2 * arch/arm/plat-mxc/iomux-v1.c
4 * Copyright (C) 2004 Sascha Hauer, Synertronixx GmbH
5 * Copyright (C) 2009 Uwe Kleine-Koenig, Pengutronix
7 * Common code for i.MX1, i.MX21 and i.MX27
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software Foundation, Inc.,
21 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
24 #include <linux/errno.h>
25 #include <linux/init.h>
26 #include <linux/kernel.h>
27 #include <linux/module.h>
28 #include <linux/string.h>
29 #include <linux/gpio.h>
31 #include <mach/hardware.h>
32 #include <asm/mach/map.h>
33 #include <mach/iomux-v1.h>
35 static void __iomem *imx_iomuxv1_baseaddr;
36 static unsigned imx_iomuxv1_numports;
38 static inline unsigned long imx_iomuxv1_readl(unsigned offset)
40 return __raw_readl(imx_iomuxv1_baseaddr + offset);
43 static inline void imx_iomuxv1_writel(unsigned long val, unsigned offset)
45 __raw_writel(val, imx_iomuxv1_baseaddr + offset);
48 static inline void imx_iomuxv1_rmwl(unsigned offset,
49 unsigned long mask, unsigned long value)
51 unsigned long reg = imx_iomuxv1_readl(offset);
53 reg &= ~mask;
54 reg |= value;
56 imx_iomuxv1_writel(reg, offset);
59 static inline void imx_iomuxv1_set_puen(
60 unsigned int port, unsigned int pin, int on)
62 unsigned long mask = 1 << pin;
64 imx_iomuxv1_rmwl(MXC_PUEN(port), mask, on ? mask : 0);
67 static inline void imx_iomuxv1_set_ddir(
68 unsigned int port, unsigned int pin, int out)
70 unsigned long mask = 1 << pin;
72 imx_iomuxv1_rmwl(MXC_DDIR(port), mask, out ? mask : 0);
75 static inline void imx_iomuxv1_set_gpr(
76 unsigned int port, unsigned int pin, int af)
78 unsigned long mask = 1 << pin;
80 imx_iomuxv1_rmwl(MXC_GPR(port), mask, af ? mask : 0);
83 static inline void imx_iomuxv1_set_gius(
84 unsigned int port, unsigned int pin, int inuse)
86 unsigned long mask = 1 << pin;
88 imx_iomuxv1_rmwl(MXC_GIUS(port), mask, inuse ? mask : 0);
91 static inline void imx_iomuxv1_set_ocr(
92 unsigned int port, unsigned int pin, unsigned int ocr)
94 unsigned long shift = (pin & 0xf) << 1;
95 unsigned long mask = 3 << shift;
96 unsigned long value = ocr << shift;
97 unsigned long offset = pin < 16 ? MXC_OCR1(port) : MXC_OCR2(port);
99 imx_iomuxv1_rmwl(offset, mask, value);
102 static inline void imx_iomuxv1_set_iconfa(
103 unsigned int port, unsigned int pin, unsigned int aout)
105 unsigned long shift = (pin & 0xf) << 1;
106 unsigned long mask = 3 << shift;
107 unsigned long value = aout << shift;
108 unsigned long offset = pin < 16 ? MXC_ICONFA1(port) : MXC_ICONFA2(port);
110 imx_iomuxv1_rmwl(offset, mask, value);
113 static inline void imx_iomuxv1_set_iconfb(
114 unsigned int port, unsigned int pin, unsigned int bout)
116 unsigned long shift = (pin & 0xf) << 1;
117 unsigned long mask = 3 << shift;
118 unsigned long value = bout << shift;
119 unsigned long offset = pin < 16 ? MXC_ICONFB1(port) : MXC_ICONFB2(port);
121 imx_iomuxv1_rmwl(offset, mask, value);
124 int mxc_gpio_mode(int gpio_mode)
126 unsigned int pin = gpio_mode & GPIO_PIN_MASK;
127 unsigned int port = (gpio_mode & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
128 unsigned int ocr = (gpio_mode & GPIO_OCR_MASK) >> GPIO_OCR_SHIFT;
129 unsigned int aout = (gpio_mode >> GPIO_AOUT_SHIFT) & 3;
130 unsigned int bout = (gpio_mode >> GPIO_BOUT_SHIFT) & 3;
132 if (port >= imx_iomuxv1_numports)
133 return -EINVAL;
135 /* Pullup enable */
136 imx_iomuxv1_set_puen(port, pin, gpio_mode & GPIO_PUEN);
138 /* Data direction */
139 imx_iomuxv1_set_ddir(port, pin, gpio_mode & GPIO_OUT);
141 /* Primary / alternate function */
142 imx_iomuxv1_set_gpr(port, pin, gpio_mode & GPIO_AF);
144 /* use as gpio? */
145 imx_iomuxv1_set_gius(port, pin, !(gpio_mode & (GPIO_PF | GPIO_AF)));
147 imx_iomuxv1_set_ocr(port, pin, ocr);
149 imx_iomuxv1_set_iconfa(port, pin, aout);
151 imx_iomuxv1_set_iconfb(port, pin, bout);
153 return 0;
155 EXPORT_SYMBOL(mxc_gpio_mode);
157 static int imx_iomuxv1_setup_multiple(const int *list, unsigned count)
159 size_t i;
160 int ret = 0;
162 for (i = 0; i < count; ++i) {
163 ret = mxc_gpio_mode(list[i]);
165 if (ret)
166 return ret;
169 return ret;
172 int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
173 const char *label)
175 int ret;
177 ret = imx_iomuxv1_setup_multiple(pin_list, count);
178 return ret;
180 EXPORT_SYMBOL(mxc_gpio_setup_multiple_pins);
182 int __init imx_iomuxv1_init(void __iomem *base, int numports)
184 imx_iomuxv1_baseaddr = base;
185 imx_iomuxv1_numports = numports;
187 return 0;